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CDCL1810ARGZT Datasheet(PDF) 14 Page - Texas Instruments |
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CDCL1810ARGZT Datasheet(HTML) 14 Page - Texas Instruments |
14 / 30 page 1 7 1 1 8 1 1 S SlaveAddress DataByte Wr A A P S Sr Rd Wr A N P Startcondition Repeatedstartcondition Read(bitvalue=1) Write(bitvalue=0) Acknowledge(bitvalue=0) Notacknowledge(bitvalue=1) Stopcondition MastertoSlavetransmission SlavetoMastertransmission SCL SDA t (BUS) t SU(SDATA) t (SDATA) h t r(SM) t r(SM) t f(SM) t f(SM) t w(SCLH) V IH(SM) V IH(SM) V IL(SM) V IL(SM) P S Bit7(MSB) Bit0(LSB) Bit6 A P t SU(STOP) t (START) h t SU(START) t w(SCLL) CDCL1810A SLLSEL1 – NOVEMBER 2014 www.ti.com 9.5.3 SDA/SCL Timing Characteristics Figure 7. Timing Diagram for the SDA/SCL Serial Control Interface 9.5.4 SDA/SCL Programming Sequence Figure 8. Legend for Programming Sequence Table 7. Byte Write Programming Sequence 1 7 1 1 8 1 8 1 1 S Slave Address Wr A Command Code A Data Byte A P Table 8. Byte Read Programming Sequence 1 7 1 1 8 1 1 7 1 1 8 1 1 Wr Command S Slave Address A A S Slave Address Rd A Data Byte N P Code Table 9. Word Write Programming Sequence: 1 7 1 1 8 1 8 1 8 1 1 S Slave Address Wr A Command Code A Data Byte Low A Data Byte High A P Table 10. Word Read Programming Sequence: 1 7 1 1 8 1 1 7 1 1 8 1 8 1 1 Slave Command Slave S Wr A A S Rd A Data Byte A Data Byte N P Address Code Address 14 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CDCL1810A |
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