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HMU17 Datasheet(PDF) 1 Page - Intersil Corporation |
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HMU17 Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 6 page ![]() 3-36 October 1997 HMU17/883 16 x 16-Bit CMOS Parallel Multiplier Features • This Circuit is Processed in Accordance to MIL-STD- 883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. • 16 x 16-Bit Parallel Multiplier with Full 32-Bit Product • High-Speed (45ns) Clocked Multiply Time • Low Power CMOS Operation -ICCSB = 500µA Maximum -ICCOP = 7.0mA Maximum at 1MHz • HMU17/883 is Compatible with the AM29517, LMU17, IDT7217, and the CY7C517 • Supports Two’s Complement, Unsigned Magnitude and Mixed Mode Multiplication • TTL Compatible Inputs/Outputs - Three-State Output Description The HMU17/883 is a high speed, low power CMOS 16 x 16-bit parallel multiplier ideal for fast, real time digital signal processing applications. The 16-bit X and Y operands may be independently specified as either two’s complement or unsigned magnitude for- mat, thereby allowing mixed mode multiplication operations. Additional inputs are provided to accommodate format adjust- ment and rounding of the 32-bit product. The Format Adjust con- trol allows the user the option of selecting a 31-bit product with the sign bit replicated LSP. The Round control is provided to accommodate rounding of the most significant portion of the result. This is accomplished by adding one to the most signifi- cant bit of the LSP. Two 16-bit output registers (MSP and LSP) are provided to hold the most and least significant portions of the result, respectively. These registers may be made transparent for asynchronous operation through the use of the Feedthrough Control (FT). The two halves of the product may be routed to a single 16-bit three- state output port via the output multiplexer control, and in addi- tion, the LSP is connected to the Y-input port through a separate three-state buffer. The HMU17/883 utilizes a single clock signal (CLK) along with three register enables (ENX, ENY, and ENP) to latch the input operands and the output product registers. The ENX and ENY inputs enable the X and Y input registers, while ENP enables both the LSP and MSP output registers. This configuration facilitates the use of the HMU17/883 for micro-programmed systems. All outputs of the HMU17/883 also offer three-state control for multiplexing onto multiuse system busses. Functional Block Diagram Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. HMU17GM-45/883 -55 to 125 68 Ld PGA HMU17GM-60/883 -55 to 125 68 Ld PGA TCX RND TCY FT CLK MSPSEL ENX ENY FA ENP OEL OEP X0-15 Y0-15/P0-15 P16-31/P0-15 MULTIPLIER ARRAY MSP REGISTER LSP REGISTER FORMAT ADJUST MULTIPLEXER REGISTER REGISTER REGISTER File Number 2805.2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 |
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