6

Operation

Figure 1 shows a simplified diagram of the voltage regulation

and current control loops. Both voltage and current feedback

are used to precisely regulate voltage and tightly control

voltage loop comprises the Error Amplifier, Comparators,

gate drivers and output MOSFETs. The Error Amplifier is

essentially connected as a voltage follower that has as an

input, the Programmable Reference DAC and an output that

is the CORE voltage.

Voltage Loop

to the inverting input of the Error Amplifier. This signal can

drive the Error Amplifier output either high or low, depending

upon the CORE voltage. Low CORE voltage makes the

amplifier output move towards a higher output voltage level.

Amplifier output voltage is applied to the positive inputs of

the Comparators via the Correction summing networks. Out-

of-phase sawtooth signals are applied to the two

Comparators inverting inputs. Increasing Error Amplifier

voltage results in increased Comparator output duty cycle.

This increased duty cycle signal is passed through the PWM

CIRCUIT with no phase reversal and on to the HIP6601,

again with no phase reversal for gate drive to the upper

MOSFETs, Q1 and Q3. Increased duty cycle or ON time for

the MOSFET transistors results in increased output voltage

to compensate for the low output voltage sensed.

Current Loop

The current control loop works in a similar fashion to the

voltage control loop, but with current control information applied

individually to each channel’s Comparator. The information

used for this control is the voltage that is developed across

conducting. A single resistor converts and scales the voltage

across the MOSFETs to a current that is applied to the Current

Sensing circuit within the HIP6304. Output from these sensing

circuits is applied to the current averaging circuit. Each PWM

channel receives the difference current signal from the

summing circuit that compares the average sensed current to

the individual channel current. When a power channel’s current

is greater than the average current, the signal applied via the

summing Correction circuit to the Comparator, reduces the

output pulse width of the Comparator to compensate for the

detected “above average” current in that channel.

Droop Compensation

In addition to control of each power channel’s output current,

the average channel current is also used to provide CORE

voltage “droop” compensation. Average full channel current

is defined as 50

amount of voltage droop required at full load current can be

programmed. The average current driven into the FB pin

direction to make the Error Amplifier “see” a higher voltage

at the inverting input, resulting in the Error Amplifier

adjusting the output voltage lower. The voltage developed

Sensing and Balancing” section for more details.

Applications and Convertor Start-Up

Each PWM power channel’s current is regulated. This

enables the PWM channels to accurately share the load

current for enhanced reliability. The HIP6601, HIP6602 or

HIP6603 MOSFET driver interfaces with the HIP6304. For

more information, see the HIP6601, HIP6602 or HIP6603

data sheets.

The HIP6304 controls the two PWM power channels 180

degrees out of phase. Figure 2 shows the out of phase

relationship between the two PWM channels.

Power supply ripple frequency is determined by the channel

For example, if the channel frequency is set to 250kHz, the

ripple frequency is 500kHz.

The IC monitors and precisely regulates the CORE voltage

of a microprocessor. After initial start-up, the controller also

provides protection for the load and the power supply. The

following section discusses these features.

Initialization

The HIP6304 usually operates from an ATX power supply.

Many functions are initiated by the rising supply voltage to the

Start and other functions are initialized during this interval.

These circuits are controlled by POR, Power-On Reset. During

this interval, the PWM outputs are driven to a three state

condition that makes these outputs essentially open. This state

results in no gate drive to the output MOSFETs.

level to insure proper internal function, the PWM outputs are

enabled and the Soft-Start sequence is initiated. If for any

POR circuit shuts the converter down and again three states

the PWM outputs.

Soft-Start

4.375V, the Soft-Start sequence is initiated. Soft-Start, by its

slow rise in CORE voltage from zero, avoids an over-current

PWM 1

PWM 2

FIGURE 2. TWO PHASE PWM OUTPUT AT 500kHz

HIP6304