AD9020

–6–

REV. C

THEORY OF OPERATION

Refer to the AD9020 block diagram. As shown, the AD9020

uses a modified “flash,” or parallel, A/D architecture. The

analog input range is determined by an external voltage refer-

± 1.75 V. An internal

resistor ladder divides this reference into 512 steps, each rep-

resenting two quantization levels. Taps along the resistor ladder

Rated performance is achieved by driving these points at 1/4,

1/2, and 3/4, respectively, of the voltage reference range.

The A/D conversion for the nine most significant bits (MSBs)

is performed by 512 comparators. The value of the least sig-

nificant bit (LSB) is determined by a unique interpolation

scheme between adjacent comparators. The decoding logic

processes the comparator outputs and provides a 10-bit code

to the output stage of the converter.

Flash architecture has an advantage over other A/D architec-

tures because conversion occurs in one step. This means the

performance of the converter is primarily limited by the speed

and matching of the individual comparators. In the AD9020,

an innovative interpolation scheme takes advantage of flash

architecture but minimizes the input capacitance, power and

device count usually associated with that method of conversion.

These advantages occur by using only half the normal num-

ber of input comparator cells to accomplish the conversion.

In addition, a proprietary decoding scheme minimizes error

codes. Input control pins allow the user to select from among

Binary, Inverted Binary, Two’s Complement and Inverted

Two’s Complement coding (see Table I).

APPLICATIONS

Many of the specifications used to describe analog/digital

converters have evolved from system performance require-

ments in these applications. Different systems emphasize

particular specifications, depending on how the part is used.

The following applications highlight some of the specifications

and features that make the AD9020 attractive in these systems.

Wideband Receivers

Radar and communication receivers (baseband and direct IF

digitization), ultrasound medical imaging, signal intelligence

and spectral analysis all place stringent ac performance require-

ments on analog-to-digital converters (ADCs).

Frequency domain characterization of the AD9020 provides sig-

nal-to-noise ratio (SNR) and harmonic distortion data to

simplify selection of the ADC.

Receiver sensitivity is limited by the Signal-to-Noise Ratio of

the system. The SNR for an ADC is measured in the fre-

quency domain and calculated with a Fast Fourier Transform

(FFT). The SNR equals the ratio of the fundamental compo-

nent of the signal (rms amplitude) to the rms value of the

noise. The noise is the sum of all other spectral components,

including harmonic distortion, but excluding dc.

Good receiver design minimizes the level of spurious signals

in the system. Spurious signals developed in the ADC are the

result of imperfections (nonlinearities, delay mismatch, vary-

ing input impedance, etc.) in the device transfer function.

In the ADC, these spurious signals appear as Harmonic Dis-

tortion. Harmonic Distortion is also measured with an FFT

and is specified as the ratio of the fundamental component of

the signal (rms amplitude) to the rms value of the worst-case

harmonic (usually the 2nd or 3rd).

Two-Tone Intermodulation Distortion (IMD) is a frequently

cited specification in receiver design. In narrow-band receiv-

ers, third-order IMD products result in spurious signals in

the passband of the receiver. Like mixers and amplifiers, the

ADC is characterized with two, equal-amplitude, pure input

frequencies. The IMD equals the ratio of the power of either

of the two input signals to the power of the strongest third-

order IMD signal. Unlike mixers and amplifiers, the IMD

does not always behave as it does in linear devices (reduced

input levels do not result in predictable reductions in IMD).

Performance graphs provide typical harmonic and SNR data

for the AD9020 for increasing analog input frequencies. In

choosing an A/D converter, always look at the dynamic range

for the analog input frequency of interest. The AD9020

specifications provide guaranteed minimum limits at three

analog test frequencies.

Aperture Delay is the delay between the rising edge of the

ENCODE command and the instant at which the analog input is

sampled. Many systems require simultaneous sampling of

more than one analog input signal with multiple ADCs. In

these situations, timing is critical and the absolute value of the

aperture delay is not as critical as the matching between devices.

Aperture Uncertainty, or jitter, is the sample-to-sample variation in

aperture delay. This is especially important when sampling high

slew rate signals in wide bandwidth systems. Aperture uncertainty

is one of the factors that degrade dynamic performance as the ana-

log input frequency is increased.

Digitizing Oscilloscopes

Oscilloscopes provide amplitude information about an observed

waveform with respect to time. Digitizing oscilloscopes must

accurately sample this signal, without distorting the information

to be displayed.

One figure of merit for the ADC in these applications is Effective

Number of Bits (ENOBs). ENOB is calculated with a sine wave

curve fit and equals:

N is the resolution (number of bits) of the ADC. The measured

error is the actual rms error calculated from the converter out-

puts with a pure sine wave input.

The Analog Bandwidth of the converter is the analog input fre-

quency at which the spectral power of the fundamental signal is

reduced 3 dB from its low frequency value. The analog band-

width is a good indicator of a converter’s stewing capabilities.