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AD8143 Datasheet(PDF) 18 Page - Analog Devices |
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AD8143 Datasheet(HTML) 18 Page - Analog Devices |
18 / 24 page ![]() AD8143 Rev. 0 | Page 18 of 24 APPLICATIONS OVERVIEW The AD8143 contains three independent active-feedback amplifiers that can be effectively applied as differential line receivers for red-green-blue (RGB) signals or component video, such as YPbPr, signals transmitted over unshielded-twisted-pair (UTP) cable. The AD8143 also contains two general-purpose comparators with hysteresis that can be used to receive digital signals or to extract video synchronization pulses from received common-mode signals that contain encoded synchronization signals. An internal linear voltage regulator derives power for the comparators from the positive supply; therefore, the AD8143 must always have a minimum positive supply voltage of 4.5 V. The AD8143 includes a power-down feature that can be asserted to reduce the supply current when a particular device is not in use. BASIC CLOSED-LOOP GAIN CONFIGURATIONS As described in the Theory of Operation section, placing a resistive feedback network between an amplifier output and its respective feedback amplifier input creates a stable negative feedback amplifier. It is important to note that the closed-loop gain of the amplifier used in the signal path is defined as the amplifier’s single-ended output voltage divided by its differential input voltage. Therefore, each amplifier in the AD8143 provides differential-to-single-ended gain. Additionally, the amplifier used for feedback has two high impedance inputs—the FB input, where the negative feedback is applied, and the REF input, which can be used as an independent single-ended input to apply a dc offset to the output signal. Some basic gain configurations implemented with an AD8143 amplifier are shown in Figure 37 through Figure 39. + – + – +5V –5V REF VREF FB RG RF 0.01 μF 0.01 μF VIN VOUT Figure 37. Basic Gain Circuit: VOUT = (VIN + VREF)(1 + RF/RG) The gain equation for the circuit in Figure 37 is VOUT = (VIN + VREF)(1 + RF/RG) (1) In this configuration, the voltage applied to the REF pin appears at the output with a gain of 1 + RF/RG. To achieve unity gain from VREF to VOUT in this configuration, divide VREF by the same factor used in the feedback loop; the same RF and RG values can be used. Figure 38 illustrates this approach. + – + – +5V –5V REF VREF FB RG RG RF RF 0.01 μF 0.01 μF VIN VOUT Figure 38. Basic Gain Circuit: VOUT = VIN (1 + RF/RG) + VREF The gain equation for the circuit in Figure 38 is VOUT = VIN (1 + RF/RG) + VREF (2) Another configuration that provides the same gain equation as Equation 2 is shown in Figure 39. In this configuration, it is important to keep the source resistance of VREF much smaller than RG to avoid gain errors. + – + – +5V –5V REF FB RG RF 0.01 μF 0.01 μF VIN VOUT VREF Figure 39. Basic Gain Circuit: VOUT = VIN (1 + RF/RG) + VREF For stability reasons, the inductance of the trace connected to the REF pin must be kept to less than 10 nH. The typical inductance of 50 Ω traces on the outer layers of the FR-4 boards is 7 nH/in, and on the inner layers, it is typically 9 nH/in. Vias must be accounted for as well. The inductance of a typical via in a 0.062-inch board is on the order of 1.5 nH. If longer traces are required, a 200 Ω resistor should be placed in series with the trace to reduce the Q-factor of the inductance. |
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