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CD4066 Datasheet(PDF) 5 Page - Intersil Corporation |
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CD4066 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 9 page ![]() 970 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Specifications CD4066BMS Final Test 100% 5004 2, 3, 8A, 8B, 10, 11 Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11 Subgroup B-6 Sample 5005 1, 7, 9 Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS MIL-STD-883 METHOD TEST READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS FUNCTION OPEN GROUND VDD 9V ± -0.5V OSCILLATOR 50kHz 25kHz Static Burn-In 1 (Note 1) 2, 3, 9, 10 1, 4-8, 11-13 14 Static Burn-In 2 (Note 1) 2, 3, 9, 10 7 1, 4-6, 8, 11-14 Dynamic Burn-In (Note 1) - 7 14 2, 3, 9, 10 5, 6, 12, 13 1, 4, 8, 11 Irradiation (Note 2) 2, 3, 9, 10 7 1, 4-6, 8, 11-14 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V Functional Diagram TRUTH TABLE EACH SWITCH INPUT OUTPUT VC VIS VOS 100 111 0 0 Open 0 1 Open Positive Logic: Switch ON VC = “1” Switch OFF VC = “0” TABLE 6. APPLICABLE SUBGROUPS (Continued) CONFORMANCE GROUP MIL-STD-883 METHOD GROUP A SUBGROUPS READ AND RECORD IN/OUT OUT/IN OUT/IN IN/OUT CONTROL B CONTROL C VSS VDD CONTROL A CONTROL D IN/OUT OUT/IN OUT/IN IN/OUT 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SW A SIG A SW D SW B SW C SIG B SIG C SIG D |
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