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AD7707 Datasheet(PDF) 25 Page - Analog Devices |
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AD7707 Datasheet(HTML) 25 Page - Analog Devices |
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25 / 52 page  AD7707 Rev. B | Page 25 of 52 ANALOG INPUT ANALOG INPUT RANGES The AD7707 contains two low level pseudo differential analog input channels, AIN1 and AIN2. These input pairs provide programmable-gain, differential input channels that can handle either unipolar or pseudo bipolar input signals. It should be noted that the bipolar input signals are referenced to the LOCOM input. The AD7707 also has a high level analog input channel AIN3, which is referenced to HICOM. Figure 13 shows the input structure on the high level input channel. In normal 5 V operation, VBIAS is normally connected to 2.5 V and HICOM is connected to AGND. This arrangement ensures that the voltages seen internally are within the common-mode range of the buffer in buffered mode and within the supply range in unbuffered mode. This device can be programmed to operate in either buffered or unbuffered mode via the BUF bit in the setup register. Note that the signals on AIN3 are with respect to the HICOM input and not with respect to AGND or DGND. The differential voltage seen by the AD7707 when using the high level input channel is the difference between AIN3(+) and AIN3(−) on the mux as shown in Figure 13. AIN3(+) = (AIN3 + 6 × VBIAS + VHICOM)/8 1R AIN3(+) AIN3(–) AIN3 VBIAS HICOM 3R 6R MUX 6R 1R = 5kΩ Figure 13. AIN3 Input Structure AIN3(−) = VHICOM + 0.75 × (VBIAS − VHICOM) In unbuffered mode, the common-mode range of the low level input channels is from AGND − 100 mV to AVDD + 30 mV. This means that in unbuffered mode, the part can handle both unipolar and bipolar input ranges for all gains. Absolute voltages of AGND − 100 mV can be accommodated on the analog inputs without degradation in performance, but leakage current increases appreciably with increasing temperature. In buffered mode, the analog inputs can handle much larger source impedances, but the absolute input voltage range is restricted to between AGND + 50 mV to AVDD − 1.5 V, which also places restrictions on the common-mode range. This means that in buffered mode, there are some restrictions on the allowable gains for bipolar input ranges. Care must be taken in setting up the common-mode voltage and input voltage range so that these limits are not exceeded; otherwise, there will be a degradation in linearity performance. In unbuffered mode, the analog inputs look directly into the 7 pF input sampling capacitor, CSAMP. The dc input leakage current in this unbuffered mode is 1 nA maximum. As a result, the analog inputs see a dynamic load that is switched at the input sample rate (see Figure 14). This sample rate depends on master clock frequency and selected gain. CSAMP is charged to AIN(+) and discharged to AIN(−) every input sample cycle. The effective resistance of the switch, RSW, is typically 7 kΩ. CSAMP must be charged through RSW and any additional source impedances every input sample cycle. Therefore, in unbuffered mode, source impedances mean a longer charge time for CSAMP and this may result in gain errors on the part. Table 26 shows the allowable external resistance/capacitance values, for unbuffered mode, such that no gain error to the 16-bit level is introduced on the part. Note that these capacitances are total capacitances on the analog input. This external capacitance includes 10 pF from the pins and lead frame of the device. AIN(+) AIN(–) FIRST INTEGRATOR HIGH INPUT IMPEDANCE >1G RSW (7kΩ TYP) SWITCHING FREQUENCY DEPENDS ON fCLKIN AND SELECTED GAIN CSAMP (7pF) VDD/2 Figure 14. Unbuffered Analog Input Structure Table 26. External R, C Combination for No 16-Bit Gain Error on Low Level Input Channels (Unbuffered Mode Only) External Capacitance (pF) Gain 0 50 100 500 1000 5000 1 368 kΩ 90.6 kΩ 54.2 kΩ 14.6 kΩ 8.2 kΩ 2.2 kΩ 2 177.2 kΩ 44.2 kΩ 26.4 kΩ 7.2 kΩ 4 kΩ 1.12 kΩ 4 82.8 kΩ 21.2 kΩ 12.6 kΩ 3.4 kΩ 1.94 kΩ 540 Ω 8 to 128 35.2 kΩ 9.6 kΩ 5.8 kΩ 1.58 Ω 880 Ω 240 Ω EXTERNAL CAPACITANCE (pF) 0 10000 10 100 1000 0 50 100 150 200 250 300 350 400 GAIN = 1 GAIN = 4 GAIN = 8 TO 128 GAIN = 2 Figure 15. External R, C Combination for No 16-Bit Gain Error on Low Level Input Channels (Unbuffered Mode Only) |
Similar Part No. - AD7707_15 |
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Similar Description - AD7707_15 |
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