A28F200BX-TB

Versions

Unit

Symbol

Parameter

Notes

Min

Max

Write Cycle Time

90

ns

RP

High Recovery

210

ns

to CE

Going Low

WE

Setup to CE

0ns

Going Low

RP

6 8

100

ns

CE

Going High

5 8

100

ns

Going High

Address Setup to

3

60

ns

CE

Going High

Data Setup to CE

460

ns

Going High

CE

Pulse Width

60

ns

Data Hold from

4

0

ns

CE

High

Address Hold

3

10

ns

from CE

High

WE

Hold from CE

High

10

ns

CE

Pulse

30

ns

Width High

Duration of WordByte

2 5

7

m

s

Programming

Operation

Duration of Erase

2 5 6

04

s

Operation (Boot)

Duration of Erase

2 5

04

s

Operation (Parameter)

Duration of Erase

2 5

07

s

Operation (Main)

5 8

0

ns

Valid SRD

RP

6 8

0

ns

from Valid SRD

Boot-Block Relock Delay

7

100

ns

NOTES

1 Chip-Enable Controlled Writes Write operations are driven by the valid combination of CE

and WE

in systems where

CE

defines the write pulse-width (within a longer WE

timing waveform) all set-up hold and inactive WE

time should be

measured relative to the CE

waveform

2 3 4 5 6 7 8 Refer to AC Characteristics for WE -Controlled Write Operations

9 Read timing characteristics during write and erase operations are the same as during read-only operations Refer to AC

Characteristics during Read Mode

10 See Standard Test Configuration

31