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AB28F200BX-T90 Datasheet(PDF) 11 Page - Intel Corporation |
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AB28F200BX-T90 Datasheet(HTML) 11 Page - Intel Corporation |
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11 / 33 page  A28F200BX-TB Table 1 Bus Operations for WORD-WIDE Mode (BYTE e VIH) Mode Notes RP CE OE WE A9 A0 VPP DQ0–15 Read 1 2 3 VIH VIL VIL VIH XX X DOUT Output Disable VIH VIL VIH VIH X X X High Z Standby VIH VIH X X X X X High Z Deep Power-Down 9 VIL X X X X X X High Z Intelligent Identifier (Mfr) 4 VIH VIL VIL VIH VID VIL X 0089H Intelligent Identifier (Device) 4 5 VIH VIL VIL VIH VID VIH X 2274H 2275H Write 6 7 8 VIH VIL VIH VIL XX X DIN Table 2 Bus Operations for BYTE-WIDE Mode (BYTE e VIL) Mode Notes RP CE OE WE A9 A0 Ab1 VPP DQ0–7 DQ8–14 Read 1 2 3 VIH VIL VIL VIH XX X X DOUT High Z Output Disable VIH VIL VIH VIH X X X X High Z High Z Standby VIH VIH X X X X X X High Z High Z Deep Power-Down 9 VIL X X X X X X X High Z High Z Intelligent Identifier (Mfr) 4 VIH VIL VIL VIH VID VIL X X 89H High Z Intelligent Identifier 4 5 VIH VIL VIL VIH VID VIH X X 74H High Z (Device) 75H Write 6 7 8 VIH VIL VIH VIL XX X X DIN High Z NOTES 1 Refer to DC Characteristics 2 X can be VIL or VIH for control pins and addresses VPPL or VPPH for VPP 3 See DC characteristics for VPPL VPPH VHH VID voltages 4 Manufacturer and Device codes may also be accessed via a CUI write sequence A1–A17 e X 5 Device ID e 2274H for A28F200BX-T and 2275H for A28F200BX-B 6 Refer to Table 3 for valid DIN during a write operation 7 Command writes for Block Erase or WordByte Write are only executed when VPP e VPPH 8 To write or erase the boot block hold RP at VHH 9 RP must be at GND g02V to meet the 80 mA maximum deep power-down current 32 Read Operations The 2-Mbit boot block flash family has three user read modes Array Intelligent Identifier and Status Register Status Register read mode will be dis- cussed in detail in the ‘‘Write Operations’’ section During power-up conditions (VCC supply ramping) it takes a maximum of 300 ns from when VCC is at 45V minimum to valid data on the outputs 321 READ ARRAY If the memory is not in the Read Array mode it is necessary to write the appropriate read mode com- mand to the CUI The 2-Mbit boot block flash family has three control functions all of which must be logi- cally active to obtain data at the outputs Chip-En- able CE is the device selection control Reset Power-Down RP is the device power control Out- put-Enable OE is the DATA INPUTOUTPUT (DQ 015 or DQ 07 ) direction control and when active is used to drive data from the selected memo- ry on to the IO bus 11 |
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