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S80C186EC20 Datasheet(PDF) 32 Page - Intel Corporation

Part # S80C186EC20
Description  16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

S80C186EC20 Datasheet(HTML) 32 Page - Intel Corporation

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80C186EC188EC 80L186EC188EC
AC SPECIFICATIONS
AC Characteristics80C186EC-2080C186EC-13
Symbol
Parameter
Min
Max
Min
Max
Unit
Notes
INPUT CLOCK
20 MHz
13 MHz
TF
CLKIN Frequency
0
40
0
26
MHz
1
TC
CLKIN Period
25
%
385
%
ns
1
TCH
CLKIN High Time
10
%
12
%
ns
1 2
TCL
CLKIN Low Time
10
%
12
%
ns
1 2
TCR
CLKIN Rise Time
1
10
1
10
ns
1 3
TCF
CLKIN Fall Time
1
10
1
10
ns
1 3
OUTPUT CLOCK
TCD
CLKIN to CLKOUT Delay
0
17
0
23
ns
1 4
T
CLKOUT Period
2
TC
2
TC
ns
1
TPH
CLKOUT High Time
(T2) b 5 (T2) a 5 (T2) b 5 (T2) a 5ns
1
TPL
CLKOUT Low Time
(T2) b 5 (T2) a 5 (T2) b 5 (T2) a 5ns
1
TPR
CLKOUT Rise Time
1616
ns
1 5
TPF
CLKOUT Fall Time
1616
ns
1 5
OUTPUT DELAYS
TCHOV1 ALE S20 DEN DTR
3
20
3
25
ns 1 4 6 7
BHE (RFSH) LOCK A1916
TCHOV2 GCS70 LCS UCS
3
23
3
30
ns 1 4 6 8
RD WR NCS WDTOUT
TCLOV1 BHE (RFSH) DEN LOCK RESOUT
3
20
3
25
ns
1 4 6
HLDA T0OUT T1OUT
TCLOV2 RD WR GSC70 LCS UCS AD150
3
23
3
30
ns
1 4 6
(AD70 A158) NCS INTA S20 A1916
TCHOF RD WR BHE (RFSH) DTR LOCK
0
25030
ns
1
S20 A1916
TCLOF
DEN AD150 (AD70 A158)
0
25
0
30
ns
1
INPUT REQUIREMENTS
TCHIS
TEST NMI T1IN T0IN READY
10
10
ns
1 9
CTS10 BCLK10 P34 P35
TCHIH
TEST NMI T1IN T0IN READY
3
3
ns
1 9
CTS10 BCLK10 P34 P35
TCLIS
AD150 (AD70) READY
10
10
ns
1 10
TCLIH
AD150 (AD70) READY
3
3
ns
1 10
TCLIS
HOLD RESIN PEREQ ERROR DRQ30
10
10
ns
1 9
TCLIH
HOLD RESIN REREQ ERROR DRQ30
3
3
ns
1 9
NOTES
1 See AC Timing Waveforms for waveforms and definition
2 Measure at VIH for high time VIL for low time
3 Only required to guarantee ICC Maximum limits are bounded by TC TCH and TCL
4 Specified for a 50 pF load see Figure 14 for capacitive derating information
5 Specified for a 50 pF load see Figure 15 for rise and fall times outside 50 pF
6 See Figure 15 for rise and fall times
7 TCHOV1 applies to BHE (RFSH) LOCK and A1916 only after a HOLD release
8 TCHOV2 applies to RD and WR only after a HOLD release
9 Setup and Hold are required to guarantee recognition
10 Setup and Hold are required for proper operation
32


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