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S80C186EC20 Datasheet(PDF) 31 Page - Intel Corporation |
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S80C186EC20 Datasheet(HTML) 31 Page - Intel Corporation |
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31 / 57 page  80C186EC188EC 80L186EC188EC AC SPECIFICATIONS AC Characteristics80C186EC25 (Continued) Symbol Parameter 25 MHz Units Notes Min Max SYNCHRONOUS INPUTS TCHIS TEST NMI INT40 BCLK10 T10IN READY CTS10 10 ns 1 9 P26 P27 TCHIH TEST NMI INT40 BCLK10 T10IN READY CTS10 3ns 1 9 TCLIS AD150 (AD70) READY 10 ns 1 10 TCLIH READY AD150 (AD70) 3 ns 1 10 TCLIS HOLD PEREQ ERROR 10 ns 1 9 TCLIH HOLD PEREQ ERROR 3ns 1 9 NOTES 1 See AC Timing Waveforms for waveforms and definition 2 Measure at VIH for high time VIL for low time 3 Only required to guarantee ICC Maximum limits are bounded by TC TCH and TCL 4 Specified for a 50 pF load see Figure 13 for capacitive derating information 5 Specified for a 50 pF load see Figure 14 for rise and fall times outside 50 pF 6 See Figure 14 for rise and fall times 7 TCHOV1 applies to BHE (RFSH) LOCK and A1916 only after a HOLD release 8 TCHOV2 applies to RD and WR only after a HOLD release 9 Setup and Hold are required to guarantee recognition 10 Setup and Hold are required for proper operation 31 |
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