 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
S80C186EC20 Datasheet(PDF) 14 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
S80C186EC20 Datasheet(HTML) 14 Page - Intel Corporation |
|
|
14 / 57 page  80C186EC188EC 80L186EC188EC Table 2 Pin Descriptions (Continued) Pin Name Pin Input Output Pin Description Type Type States P31TXI1 O H(X)H(Q) Transmit Interrupt output goes active to indicate that serial channel 1 has completed a transfer TXI1 is R(0) multiplexed with an output only Port function I(Q) P(X) P30RXI1 O H(X)H(Q) Receive Interrupt output goes active to indicate that serial channel 1 has completed a reception RXI1 is R(0) multiplexed with an output only port function I(Q) P(X) WDTOUT O H(Q) WatchDog Timer OUTput is driven low for four clock cycles when the watchdog timer reaches zero WDTOUT R(1) may be ANDed with the power-on reset signal to reset the I(Q) processor when the watchdog timer is not properly reset P(X) P27CTS1 IO A(L) H(X) Clear-To-Send input is used to prevent the transmission of serial data on the TXD signal pin CTS1 and CTS0 are P23CTS0 R(Z) multiplexed with an IO Port function I(X) P(X) P26BCLK1 IO A(L) H(X) Baud CLocK input can be used as an alternate clock source for each of the integrated serial channels The P22BCLK0 A(E) R(Z) BCLK inputs are multiplexed with IO Port functions The I(X) BCLK input frequency cannot exceed the operating P(X) frequency of the processor P25TXD1 IO A(L) H(Q) Transmit Data output provides serial data information The TXD outputs are multiplexed with IO Port functions P21TXD0 R(Z) During synchronous serial communications TXD will I(X)I(Q) function as a clock output P(X) P24RXD1 IO A(L) H(X)H(Q) Receive Data input accepts serial data information The RXD pins are multiplexed with IO Port functions During P20RXD0 R(Z) synchronous serial communications RXD is bi-directional I(X)I(Q) and will become an output for transmission of data (TXD P(X) becomes the clock) DRQ30 I A(L) DMA ReQuest input pins are used to request a DMA transfer The timing of the request is dependent on the programmed synchronization mode NOTES 1 READY is A(E) for the rising edge of CLKOUT S(E) for the falling edge of CLKOUT 2 Pin names in parentheses apply to the 80C188EC80L188EC 14 |
Similar Part No. - S80C186EC20 |
|
Similar Description - S80C186EC20 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
