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AD1895 Datasheet(PDF) 22 Page - Analog Devices |
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AD1895 Datasheet(HTML) 22 Page - Analog Devices |
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22 / 24 page  REV. B AD1895 –22– Serial Data Port Master Clock Modes Either of the AD1895 serial ports can be configured as a master serial data port. However, only one serial port can be amaster, while the other has to be a slave. In Master Mode, the AD1895 requires a 256 × fS, 512 fS, or 768 × fS master clock (MCLK_IN). For a maximum master clock frequency of 30 MHz, the maximum sample rate is limited to 96 kHz. In Slave Mode, sample rates up to 192 kHz can be handled. When either of the serial ports is operated in Master Mode, the master clock is divided down to derive the associated left/right subframe clock (LRCLK) and serial bit clock (SCLK). The master clock frequency can be selected for 256, 512, or 768 times the input or output sample rate. Both the input and output serial ports will support Master Mode LRCLK and SCLK generation for all serial modes, left justified, I 2S, right justified, and TDM for the output serial port. Table IV. Serial Data Port Clock Modes MMODE_0/ MMODE_1/ MMODE_2 210 Interface Format 000Both Serial Ports Are in Slave Mode 001 Output Serial Port Is Master with 768 × f S_OUT 010Output Serial Port Is Master with 512 × fS_OUT 011 Output Serial Port Is Master with 256 × f S_OUT 100Undefined 101 Input Serial Port Is Master with 768 × fS_IN 110 Input Serial Port Is Master with 512 × f S_IN 111 Input Serial Port Is Master with 256 × f S_IN Bypass Mode When the BYPASS pin is asserted high, the input data bypasses the sample rate converter and is sent directly to the serial output port. Dithering of the output data when the word length is set to less than 24 bits is disabled. This mode is ideal when the input and output sample rates are the same and LRCLK_I and LRCLK_O are synchronous with respect to each other. This mode can also be used for passing through nonaudio data, since no processing is performed on the input data in this mode. |
Similar Part No. - AD1895_15 |
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Similar Description - AD1895_15 |
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