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AD1895 Datasheet(PDF) 18 Page - Analog Devices |
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AD1895 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 24 page  REV. B AD1895 –18– The digital servo loop is essentially a ramp filter that provides the initial pointer to the address in RAM and ROM for the start of the FIR convolution. The RAM pointer is the integer output of the ramp filter, while the ROM is the fractional part. The digital servo loop must be able to provide excellent rejection of jitter on the fS_IN and fS_OUT clocks as well as measure the arrival of the fS_OUT clock within 4.97 ps. The digital servo loop will also divide the fractional part of the ramp output by the ratio of fS_IN/fS_OUT for the case when fS_IN > fS_OUT, to dynamically alter the ROM coefficients. The digital servo loop is implemented with a multirate filter. To settle the digital servo loop filter quicker upon startup or a change in the sample rate, a Fast Mode was added to the filter. When the digital servo loop starts up or the sample rate is changed, the digital servo loop kicks into Fast Mode to adjust and settle on the new sample rate. Upon sensing the digital servo loop settling down to some reasonable value, the digital servo loop will kick into Normal or Slow Mode. During Fast Mode, the MUTE_OUT signal of the sample rate converter is asserted to let the user know that they should mute the sample rate converter to avoid any clicks or pops. The frequency response of the digital servo loop for Fast Mode and Slow Mode are shown in Figure 8. The FIR filter is a 64-tap filter in the case of fS_OUT ≥ fS_IN and is (fS_IN/fS_OUT) × 64 taps for the case when f S_IN > fS_OUT. The FIR filter performs its convolution by loading in the starting address of the RAM address pointer and the ROM address pointer from the digital servo loop at the start of the fS_OUT period. The FIR filter then steps through the RAM by decrementing its address by 1 for each tap, and the ROM pointer increments its address by the (fS_OUT/fS_IN) × 220 ratio for f S_IN > fS_OUT or 2 20 for fS_OUT ≥ f S_IN. Once the ROM address rolls over, the con- volution is completed. The convolution is performed for both the left and right channels, and the multiply accumulate circuit used for the convolution is shared between the channels. The fS_IN/fS_OUT sample rate ratio circuit is used to dynamically alter the coefficients in the ROM for the case when fS_IN > fS_OUT. The ratio is calculated by comparing the output of an fS_OUT counter to the output of an fS_IN counter. If fS_OUT > fS_IN, the ratio is held at 1. If fS_IN > fS_OUT, the sample rate ratio is updated if it is different by more than two fS_OUT periods from the previous fS_OUT to fS_IN comparison. This is done to provide some hysteresis to prevent the filter length from oscillating and causing distortion. 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 –190 –200 –210 –220 0.01 0.1 1 10 100 1e3 1e4 1e5 FREQUENCY – Hz SLOW MODE FAST MODE Figure 8. Frequency Response of the Digital Servo Loop. fS_IN is the x-axis, fS_OUT = 192 kHz, master clock frequency is 30 MHz. |
Similar Part No. - AD1895_15 |
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Similar Description - AD1895_15 |
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