Integrated Device Technology, Inc.

®

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

3.3V CMOS

18-BIT UNIVERSAL BUS

TRANSCEIVER

WITH 3-STATE OUTPUTS

DESCRIPTION:

The FCT163601/A 18-bit registered transceiver is built

using advanced dual metal CMOS technology. These 18-bit

universal bus transceivers combine D-type latches and D-

type flip-flops to allow data flow in transparent, latched and

clocked modes.

Data flow in each direction is controlled by output-enable

(

OEAB and OEBA), latch-enable (LEAB and LEBA), and clock

(CLKAB and CLKBA) inputs. The clock can be controlled by

the clock-enable (

CLKENAB and CLKENBA) inputs. For A-to-

B data flow, the device operates in the transparent mode when

LEAB is high. When LEAB is low, the A data is latched if

CLKAB is held at a high or low logic level. If LEAB is low, the

A-bus data is stored in the latch/flip-flop on the low-to-high

transition of CLKAB. Output enable

OEAB is active low.

When

OEAB is low, the outputs are active. When OEAB is

high, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses

OEBA,

LEBA, CLKBA and

CLKENBA.

The FCT163601 has series current limiting resistors. These

offer low ground bounce, minimal undershoot, and controlled

output fall times-reducing the need for external series termi-

nating resistors.

LEAB

CLKAB

LEBA

CLKBA

CLKENAB

OEAB

TO 17 OTHER CHANNELS

OEBA

CE

1D

C1

CLK

CE

1D

C1

CLK

CLKENBA

1

56

55

2

28

30

29

27

3

54

3251 drw 01

FUNCTIONAL BLOCK DIAGRAM

COMMERCIAL TEMPERATURE RANGE

AUGUST 1996

©1996 Integrated Device Technology, Inc.

5.9

DSC-3251/1

1

IDT74FCT163601/A

ADVANCE INFORMATION

FEATURES:

• 0.5 MICRON CMOS Technology

• ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

• Packages include 25 mil pitch SSOP, 19.6 mil pitch

TSSOP and 15.7 mil pitch TVSOP

• Extended commercial range of -40

°C to +85°C

±0.3V, Normal Range or

• CMOS power levels (0.4

µW typ. static)

• Rail-to-Rail output swing for increased noise margin

• Low Ground Bounce (0.3V typ.)

• Inputs (except I/O) can be driven by 3.3V or 5V

components