![]() |
Electronic Components Datasheet Search |
|
IDT72251 Datasheet(PDF) 7 Page - Integrated Device Technology |
|
|
IDT72251 Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 17 page ![]() 5.14 7 IDT72251 CMOS SyncFIFO ™ 8192 x 9 COMMERCIAL TEMPERATURE RANGES tRS tRSR RS REN1, REN2 tRSF tRSF OE = 1 OE = 0 (2) EF, PAE FF, PAF Q0 - Q8 2655 drw 06 WEN2/ LD WEN1 (1) tRSS tRSF tRSR tRSS tRSR tRSS NOTES: 1. Holding WEN2/ LD HIGH during reset will make the pin act as a second write enable pin. Holding WEN2/LD LOW during reset will make the pin act as a load enable for the programmable flag offset registers. 2. After reset, the outputs will be LOW if OE = 0 and tri-state if OE = 1. 3. The clocks (RCLK, WCLK) can be free-running during reset. Figure 4. Reset Timing |
Similar Part No. - IDT72251 |
|
Similar Description - IDT72251 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |