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IDT72132 Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT72132 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 13 page ![]() 5.36 2 IDT72132, IDT72142 CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9 COMMERCIAL TEMPERATURE RANGES PIN DESCRIPTIONS Symbol Name I/O Description SI Serial Input I Serial data is shifted in least significant bit first. In the serial cascade mode, the Serial Input (SI) pins are tied together and SIX plus D7, D8 determine which device stores the data. RS Reset I When RS is set LOW, internal READ and WRITE pointers are set to the first location of the RAM array. HF and FF go HIGH, and AEF, and EF go LOW. A reset is required before an initial WRITE after power-up. R must be HIGH during an RS cycle. NW Next Write I To program the Serial In word width , connect NW with one of the Data Set pins (D7, D8). SICP Serial Input Clock I Serial data is read into the serial input register on the rising edge of SICP. In both Depth and Serial Word Width Expansion modes, all of the SICP pins are tied together. R Read I When READ is LOW, data can be read from the RAM array sequentially, independent of SICP. In order for READ to be active, EF must be HIGH. When the FIFO is empty (EF-LOW), the internal READ operation is blocked and Q0-Q8 are in a high impedance condition. FL/RT First Load/ I This is a dual-purpose input. In the single device configuration ( XI grounded), activating retransmit ( FL/RT-LOW) will set the internal READ pointer to the first location. There is no effect on the WRITE pointer. R must be HIGH and SICP must be LOW before setting FL/RT LOW. Retransmit is not possible in depth expansion. In the depth expansion configuration, FL/RT grounded indicates the first activated device. XI Expansion In I In the single device configuration, XI is grounded. In depth expansion or daisy chain expansion, XI is connected to XO (expansion out) of the previous device. SIX Serial Input I In the Expansion mode, the SIX pin of the least significant device is tied HIGH. The SIX pin of all other devices is connected to the D7 or D8 pin of the previous device. For single device operation, SIX is tied HIGH. OE Output Enable I When OE is set LOW, the parallel output buffers receive data from the RAM array. When OE is set HIGH, parallel three state buffers inhibit data flow. Q0–Q8 Output Data O Data outputs for 9-bit wide data. FF Full Flag O When FF goes LOW, the device is full and data must not be clocked by SICP. When FF is HIGH, the device is not full. See the diagram on page 7 for more details. EF Empty Flag O When EF goes LOW, the device is empty and further READ operations are inhibited. When EF is HIGH, the device is not empty. AEF Almost-Empty/ O When AEF is LOW, the device is empty to 1/8 full or 7/8 to completely full. When AEF is HIGH, the device is greater than 1/8 full, but less than 7/8 full. XO/HF Expansion Out/ O This is a dual-purpose output. In the single device configuration ( XI grounded), the device is more than half full when HF is LOW. In the depth expansion configuration (XO connected to XI of the next device), a pulse is sent from XO to XI when the last location in the RAM array is filled. D7, D8 Data Set O The appropriate Data Set pin (D7, D8 ) is connected to NW to program the Serial In data word width. For example: D7 - NW programs a 8-bit word width, D8 - NW programs a 9-bit word width, etc. VCC Power Supply Single Power Supply of 5V. GND Ground Three grounds at 0V. 2752 tbl 01 Retransmit Expansion Half-Full Flag Almost-Full Flag STATUS FLAGS Number of Words in FIFO IDT72132 IDT72142 FF AEF HF EF 00 H L H L 1-255 1-511 H L H H 256-1024 512-2048 H H H H 1025-1792 2049-3584 H H L H 1793-2047 3585-4095 H L L H 2048 4096 L L L H 2752 tbl 02 |
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