IDT72132 datasheet(10/13 Pages) IDT

Part #	IDT72132

Description	CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9

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Manufacturer	IDT [Integrated Device Technology]

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10 / 13 page

5.36

10

IDT72132, IDT72142

CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9

COMMERCIAL TEMPERATURE RANGES

OPERATING CONFIGURATIONS

Single Device Configuration

In the standalone case, the SIX line is tied HIGH and not

used. On the first LOW-to-HIGH of the SICP clock, both of the

Data Set lines (D7, D8) go LOW and a new serial word is

started. The Data Set lines then go HIGH on the equivalent

SICP clock pulse. This continues until the D line connected to

NW goes HIGH completing the serial word. The cycle is then

repeated with the next LOW-to-HIGH transition of SICP.

TRUTH TABLES

TABLE 1: RESET AND RETRANSMIT

SINGLE DEVICE CONFIGURATION/WIDTH EXPANSION MODE

Inputs

Internal Status

Outputs

Mode

RS

FL/RT

XI

Read Pointer

Write Pointer

AEF, EF

FF

HF

Reset

0

X

0

Location Zero

0

1

Retransmit

1

0

Location Zero

Unchanged

X

Read/Write

1

0

Increment

(1)

Increment

(1)

XX

X

NOTE:

2752 tbl 09

1. Pointer will increment if appropriate flag is HIGH.

2752 drw 16

SICP

NW

VCC

012

345

67

012

345

67

8

D 7

D 8

SICP

SIX

SERIAL INPUT CLOCK

SI

XI

PARALLEL DATA OUTPUT

GND

SERIAL DATA IN

Q0-8

NW

D 7 D 8

8

0

Figure 13. Nine-Bit Word Single Device Configuration

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IDT72132 Datasheet(PDF) 10 Page - Integrated Device Technology

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