5.36

8

IDT72132, IDT72142

CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9

COMMERCIAL TEMPERATURE RANGES

NOTE:

1.

Figure 10. Retransmit

Figure 9. Half Full, Almost Full and Almost Empty Timings

2752 drw 11

SICP

0

1

n – 1

R

FF

(1)

SI

Figure 8. Full Boundry Condition Timing

2752 drw 12

SICP

R

HF

7/8 FULL

ALMOST-EMPTY

(1/8 FULL-1)

1/8 FULL

ALMOST FULL (7/8 + 1)

7/8 FULL

ALMOST-EMPTY

(1/8 FULL-1)

0

1

n – 2

n – 1

AEF

AEF

HALF-FULL

HALF_FULL + 1

HALF-FULL

2752 drw 13

R

SICP

RT

EF, AEF, HF, FF

FLAG VALID

01

NOTE:

1. After

FF goes LOW and the last bit of the final word has been clocked in, SICP should not be clocked until FF goes HIGH.