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IDT72132 Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT72132 Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 13 page  5.36 4 IDT72132, IDT72142 CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9 COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (Commercial: VCC = 5.0V ± 10%, TA = 0°C to +70°C) Commercial IDT72132L35 IDT72132L50 IDT72142L35 IDT72142L50 Symbol Parameter Min. Max. Min. Max. Unit tS Parallel Shift Frequency — 22.2 — 15 MHz tSICP Serial-InShift Frequency — 50 — 40 MHz PARALLEL OUTPUT TIMINGS tA Access Time — 35 — 50 ns tRR Read Recovery Time 10 — 15 — ns tRPW Read Pulse Width 35 — 50 — ns tRC Read Cycle Time 45 — 65 — ns tRLZ Read Pulse LOW to Data Bus at Low-Z (1) 5 — 10 — ns tRHZ Read Pulse HIGH to Data Bus at High-Z (1) —20 — 30 ns tDV Data Valid from Read Pulse HIGH 5 — 5 — ns tOEHZ Output Enable to High-Z (Disable) (1) —15 — 15 ns tOELZ Output Enable to Low-Z (Enable) (1) 5— 5— ns tAOE Output Enable to Data Valid (Q0-8) — 20 — 22 ns SERIAL INPUT TIMINGS tSIS Serial Data in Set-Up Time to SICP Rising Edge 12 — 15 — ns tSIH Serial Data in Hold Time to SICP Rising Edge 0 — 0 — ns tSIX SIX Set-Up Time to SICP Rising Edge 5 — 5 — ns tSICW Serial-In Clock Width HIGH/LOW 8 — 10 — ns FLAG TIMINGS tSICEF SICP Rising Edge (Last Bit - First Word) to EF HIGH — 45 — 65 ns tSICFF SICP Rising Edge (Bit 1 - Last Word) to FF LOW — 30 — 40 ns tSICF SICP Rising Edge to HF, AEF —45 — 65 ns tRFFSI Recovery Time SICP After FF Goes HIGH 15 — 15 — ns tREF Read LOW to EF LOW — 30 — 45 ns tRFF Read HIGH to FF HIGH — 30 — 45 ns tRF Read HIGH to Transitioning HF and AEF —45 — 65 ns tRPE Read Pulse Width After EF HIGH 35 — 50 — ns RESET TIMINGS tRSC Reset Cycle Time 45 — 65 — ns tRS Reset Pulse Width 35 — 50 — ns tRSS Reset Set-up Time 35 — 50 — ns tRSR Reset Recovery Time 10 — 15 — ns tRSF1 Reset to EF and AEF LOW — 45 — 65 ns tRSF2 Reset to HF and FF HIGH — 45 — 65 ns tRSDL Reset to D LOW 20 — 35 — ns tPOI SICP Rising Edge to D 5 17 5 20 ns RETRANSMIT TIMINGS tRTC Retransmit Cycle Time 45 — 65 — ns tRT Retransmit Pulse Width 35 — 50 — ns tRTS Retransmit Set-up Time 35 — 50 — ns tRTR Retransmit Recovery Time 10 — 15 — ns DEPTH EXPANSION MODE TIMINGS tXOL Read/Write to XO LOW — 40 — 50 ns tXOH Read/Write to XO HIGH — 40 — 50 ns tXI XI Pulse Width 35 — 50 — ns tXIR XI Recovery Time 10 — 10 — ns tXIS XI Set-up Time 16 — 15 — ns NOTE: 2752 tbl 07 1. Guaranteed by design minimum times, not tested |
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