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IDT72131 Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT72131 Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 13 page ![]() Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGES DECEMBER 1996 ©1996 Integrated Device Technology, Inc. DSC-2751/6 5.34 1 DESCRIPTION: The IDT72131/72141 are high-speed, low power parallel- to-serial FIFOs. These FIFOs are ideally suited to serial communications applications, tape/disk controllers, and local area networks (LANs). The IDT72131/72141 can be config- ured with the IDTs serial-to-parallel FIFOs (IDT72132/72142) for bidirectional serial data buffering. The FIFO has a 9-bit parallel input port and a serial output port. Wider and deeper parallel-to-serial data buffers can be built using multiple IDT72131/72141 chips. IDTs unique Flexishift serial expansion logic (SOX, NR) makes width expansion possible with no additional components. These FIFOs will expand to a variety of word widths including 8, 9, 16, and 32 bits. The IDT72131/141 can also be directly connected for depth expansion. Five flags are provided to monitor the FIFO. The full and empty flags prevent any FIFO data overflow or underflow conditions. The almost-full (7/8), half-full, and almost empty (1/8) flags signal memory utilization within the FIFO. The IDT72131/72141 is fabricated using IDTs high-speed submicron CMOS technology. FEATURES: • 35ns parallel port access time, 45ns cycle time • 50MHz serial port shift rate • Expandable in depth and width with no external components • Programmable word lengths including 7-9, 16-18, 32-36 bit using Flexishift ™ serial output without using any additional components • Multiple status flags: Full, Almost-Full (1/8 from full), Half-Full, Almost Empty (1/8 from empty), and Empty • Asynchronous and simultaneous read and write operations • Dual-Port zero fall-through architecture • Retransmit capability in single device mode • Produced with high-performance, low power CMOS technology • Available in 28-pin plastic DIP • Industrial temperature range (-40oC to +85oC) is avail- able, tested to military electrical specifications FUNCTIONAL BLOCK DIAGRAM CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 IDT72131 IDT72141 5 6 7 8 9 10 11 12 FF W D4 D3 1 2 3 4 26 25 24 23 22 21 20 19 Vcc 18 17 16 15 P28-1 & C28-3 D5 D2 D1 D XI SOX D6 D7 D8 FL/RT RS EF XO/HF SOCP SO AEF GND 13 14 28 27 Q 4 GND Q8 Q7 Q6 NR 2751 drw 02a 0 PIN CONFIGURATION DIP TOP VIEW 2751 drw 01 D0-D RAM ARRAY 2048 x 9 4096 x 9 WRITE POINTER NEXT READ POINTER FLAG LOGIC EF AEF /HF FF NR 8 W RESET LOGIC RS EXPANSION LOGIC XI FL/RT XO/ SERIAL OUTPUT CIRCUITRY SOCP SOX SO Q4 Q6 Q7 Q8 The IDT logo is a registered trademark of Integrated Device Technology, Inc. For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391. |
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