6.35

2

IDT70V05S/L

HIGH-SPEED 3.3V 8K x 8 DUAL-PORT STATIC RAM

COMMERCIAL TEMPERATURE RANGE

operation without the need for additional discrete logic.

This device provides two independent ports with separate

control, address, and I/O pins that permit independent,

asynchronous access for reads or writes to any location in

memory. An automatic power down feature controlled by

CE

permits the on-chip circuitry of each port to enter a very low

standby power mode.

Fabricated using IDT’s CMOS high-performance technol-

ogy, these devices typically operate on only 350mW of power.

Low-power (L) versions offer battery backup data retention

capability with typical power consumption of 500

µW from a 2V

battery.

The IDT70V05 is packaged in a ceramic 68-pin PGA, a 68-

pin PLCC, and a 64-pin thin plastic quad flatpack (TQFP).

2941 drw 02

12

13

14

15

16

17

18

INDEX

19

20

21

22

987

6543

21 68 67 66 65

27 28 29 30 31 32 33 34 35 36 37 38 39

GND

11

10

M/

S

23

24

25

26

40 41 42 43

58

57

56

55

54

53

52

51

50

49

48

59

60

47

46

45

44

64 63 62 61

GND

GND

IDT70V05

J68-1

F68-1

PLCC / FLATPACK

TOP VIEW(3)

INDEX

IDT70V05

PN-64

TQFP

TOP VIEW(3)

8

9

10

11

12

13

14

15

16

1

2

3

4

5

6

7

46

45

44

43

42

41

40

39

38

37

36

35

34

47

48

33

GND

GND

GND

M/

S

2941 drw 03

NOTES:

1. All Vcc pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

3. This text does not indicate orientation of the actual part-marking.