Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

OCTOBER 1996

©1996 Integrated Device Technology, Inc.

DSC-2738/6

IDT7005S/L

HIGH-SPEED

8K x 8 DUAL-PORT

STATIC RAM

FEATURES:

• True Dual-Ported memory cells which allow simulta-

neous access of the same memory location

• High-speed access

— Military: 20/25/35/55/70ns (max.)

— Commercial:15/17/20/25/35/55ns (max.)

• Low-power operation

— IDT7005S

Active: 750mW (typ.)

Standby: 5mW (typ.)

— IDT7005L

Active: 750mW (typ.)

Standby: 1mW (typ.)

• IDT7005 easily expands data bus width to 16 bits or

more using the Master/Slave select when cascading

more than one device

•M/

S = H for BUSY output flag on Master,

M/

S = L for BUSY input on Slave

• Busy and Interrupt Flags

• On-chip port arbitration logic

• Full on-chip hardware support of Semaphore signaling

between ports

• Fully asynchronous operation from either port

• Devices are capable of withstanding greater than 2001V

electrostatic discharge

• Battery backup operation—2V data retention

• TTL-compatible, single 5V (

±10%) power supply

• Available in 68-pin PGA, 68-pin quad flatpack, 68-pin

PLCC, and a 64-pin TQFP

• Industrial temperature range (–40

°C to +85°C) is avail-

able, tested to military electrical specifications

DESCRIPTION:

The IDT7005 is a high-speed 8K x 8 Dual-Port Static RAM.

The IDT7005 is designed to be used as a stand-alone Dual-

Port RAM or as a combination MASTER/SLAVE Dual-Port

NOTES:

1. (MASTER):

BUSY is output;

(SLAVE):

BUSY

is input.

2.

BUSY outputs

and

INT outputs

are non-tri-stated

push-pull.

FUNCTIONAL BLOCK DIAGRAM

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

1

I/O

Control

Address

Decoder

MEMORY

ARRAY

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

Address

Decoder

I/O

Control

R/

2738 drw 01

R/

M/

S

(2)

(1,2)

(1,2)

(2)

R/

R/

13

13

For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.

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