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UPA1720 Datasheet(PDF) 1 Page - NEC |
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UPA1720 Datasheet(HTML) 1 Page - NEC |
1 / 8 page The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. © 1998, 1999 MOS FIELD EFFECT TRANSISTOR µµµµ PA1720 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE DATA SHEET Document No. G13888EJ2V0DS00 (2nd edition) Date Published March 2000 NS CP(K) Printed in Japan The mark 5 shows major revised points. DESCRIPTION The µ PA1720 is N-Channel MOS Field Effect Transistor designed for DC / DC Converters and power management application of notebook computers. FEATURES • Low On-Resistance RDS(on)1 = 25.0 m Ω MAX. (VGS = 10 V, ID = 4.0 A) RDS(on)2 = 33.0 m Ω MAX. (VGS = 4.5 V, ID = 4.0 A) RDS(on)3 = 38.0 m Ω MAX. (VGS = 4.0 V, ID = 4.0 A) • Low Ciss : Ciss = 800 pF TYP. • Built-in G-S Protection Diode • Small and Surface Mount Package (Power SOP8) ORDERING INFORMATION PART NUMBER PACKAGE µ PA1720G Power SOP8 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, All terminals are connected.) Drain to Source Voltage (VGS = 0) VDSS 30 V Gate to Source Voltage (VDS = 0) VGSS ±20 V Drain Current (DC) ID(DC) ±8 A Drain Current (Pulse) Note1 ID(pulse) ±32 A Total Power Dissipation (TA = 25 °C) Note2 PT 2.0 W Single Avalanche Current Note3 IAS 8.0 A Single Avalanche Energy Note3 EAS 6.4 mJ Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to + 150 °C Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 % 2. Mounted on ceramic substrate of 1200 mm 2 x 2.2 mm 3. Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V |
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