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UPA1709 Datasheet(PDF) 1 Page - NEC |
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UPA1709 Datasheet(HTML) 1 Page - NEC |
1 / 8 page © 1998 MOS FIELD EFFECT TRANSISTOR µµµµ PA1709 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE DATA SHEET Document No. G13436EJ1V0DS00 (1st edition) Date Published November 1998 NS CP(K) Printed in Japan DESCRIPTION This product is N-Channel MOS Field Effect Transistor designed for DC/DC converters and power management switch. FEATURES • Low on-resistance RDS(on)1 = 9.3 m Ω (TYP.) (VGS = 10 V, ID = 4.5 A) RDS(on)2 = 13.8 m Ω (TYP.) (VGS = 4.5 V, ID = 4.5 A) • Low Ciss : Ciss = 1850 pF (TYP.) • Built-in G-S protection diode • Small and surface mount package (Power SOP8) ORDERING INFORMATION PART NUMBER PACKAGE µ PA1709G Power SOP8 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 40 V Gate to Source Voltage (VDS = 0 V) VGSS ±25 V Drain Current (DC) ID(DC) ±9.0 A Drain Current (pulse) Note1 ID(pulse) ±36 A Total Power Dissipation (TA = 25°C) Note2 PT 2.0 W Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to + 150 °C Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1 % 2. Mounted on ceramic substrate of 1200 mm 2 x 0.7 mm Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. EQUIVARENT CIRCUIT Source Body Diode Gate Protection Diode Gate Drain PACKAGE DRAWING (Unit : mm) 1.27 0.12 M 6.0 ±0.3 4.4 0.40 +0.10 –0.05 0.78 Max. 0.8 0.5 ±0.2 5.37 Max. 0.10 14 85 1,2,3 4 5,6,7,8 ; Source ; Gate ; Drain |
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