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AT42QT1111-AU Datasheet(PDF) 32 Page - ATMEL Corporation |
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AT42QT1111-AU Datasheet(HTML) 32 Page - ATMEL Corporation |
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32 / 50 page  32 AT42QT1111-MU / AT42QT1111-AU [DATASHEET] 9571C–AT42–05/2013 7.11 Addresses 7 – 8: AKS Mask AKS_n (AKS Mask): 0 = key n AKS disabled, 1 = key n AKS enabled (where n is 0–10). These bits control which keys have AKS enabled (see Section 3. on page 8). A “1” means the corresponding key has AKS enabled; a 0 means that the corresponding key has AKS disabled. Default AKS mask: 0x07 and 0xFF (all keys have AKS enabled) 7.12 Addresses 9 – 15: Detect0 – Detect6 PWM Each of the 7 detect pins can be configured to output a PWM signal to indicate whether the key is touched (in detect) or not touched (out of detect). The Detect outputs must be enabled by selecting 7-key mode in the “Device Mode” setting (see Section 7.4 on page 28), and the corresponding “Key to LED” bits must be set to enable the individual Detect outputs for each key (see Section 7.14 on page 34). IN_DETECTn: PWM to output when key n is “In Detect” (where n is 0–6). OUT_DETECTn: PWM to output when key n is “Out of Detect” (where n is 0–7). This PWM is also output if the DETECT output is “disconnected” from the key (that is, “LED_n” in address 17 is set to 0), allowing the host to directly control the PWM output. Table 7-9. AKS Mask Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 7 AKS_10 AKS_9 AKS_8 8 AKS_7 AKS_6 AKS_5 AKS_4 AKS_3 AKS_2 AKS_1 AKS_0 Table 7-10. Detect0 – Detect6 PWM Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 9 IN_DETECT0 OUT_DETECT0 10 IN_DETECT1 OUT_DETECT1 11 IN_DETECT2 OUT_DETECT2 12 IN_DETECT3 OUT_DETECT3 13 IN_DETECT4 OUT_DETECT4 14 IN_DETECT5 OUT_DETECT5 15 IN_DETECT6 OUT_DETECT6 |
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