 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AT42QT1111-AU Datasheet(PDF) 29 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT42QT1111-AU Datasheet(HTML) 29 Page - ATMEL Corporation |
|
|
29 / 50 page  29 AT42QT1111-MU / AT42QT1111-AU [DATASHEET] 9571C–AT42–05/2013 1 = Edge Acquisition starts when a rising edge is detected at the SYNC pin. When acquisition and post-processing are completed, the device sleeps until another rising edge is detected at the SYNC pin. REPEAT_TIME: selects the “repeat” time when “Timed” is selected as the trigger to start key acquisition. The number entered is a multiple of 16 ms. If 0 is entered, the device will operate in a continuous free run mode; that is, the QT1111 will not sleep after its cycle is completed but will begin the next key acquisition cycle immediately. Default KEY_AC value: 1 (timed) Default MODE value: 0 (7-key mode) Default SIGNAL value: 1 (parallel) Default SYNC value: 1 (edge) Default REPEAT_TIME value: 2 (32 ms cycle) 7.5 Address 1: Guard Key/Comms Options GUARD_KEY: specifies the key (0 to 10) to be used as a guard channel (see Section 2.3 on page 7) . GD_EN: enables the use of a guard key; 0 = disable, 1 = enable. SPI_EN: enables the Quick SPI interface; 0 = disable, 1 = enable. See Section 4.1.6 on page 15 for details of the Quick SPI Mode report. To exit this mode (and clear the SPI_EN bit), the command 0x36 should be sent. To save the settings to EEPROM and make Quick SPI mode active on startup, send the Store to EEPROM command (0x0A). Any other data sent is ignored in Quick SPI mode. CHG: the CHANGE pin mode (see Section 4.5 on page 17): 0 = Data mode. In this mode the CHANGE pin is asserted to indicate unread data. 1 = Touch mode. In this mode the CHANGE pin is asserted when a key is being touched or is in detect. CRC: enables or disables CRC; 0 = disable, 1 = enable. When this option is enabled, each data exchange must have a CRC byte appended. When report or setup data is being returned by the QT1111, a 1-byte checksum is returned. The host should confirm that this checksum is correct and, if not, should request the report again. Where data is being sent by the host, a 1-byte CRC should be sent. The QT1111 returns the expected CRC byte in the same transaction the CRC byte is sent. In this way, the host can immediately determine whether the setup data bytes were received correctly. If the host sends an incorrect CRC following a “Get” command, the QT1111 returns the code “0xEE” to indicate an error. It then resets the SPI interface. On the next byte exchange 0x55 is transmitted. Default GUARD_KEY value: 0 (Key 0) Default GD_EN value: 0 (disabled) Default CHG value: 0 (data mode) Default CRC value: 0 (disabled) Table 7-3. Guard Key/Comms Options Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 1 GUARD_KEY GD_EN SPI_EN CHG CRC |
Similar Part No. - AT42QT1111-AU_14 |
|
Similar Description - AT42QT1111-AU_14 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
