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AT42QT1111-AU Datasheet(PDF) 18 Page - ATMEL Corporation |
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AT42QT1111-AU Datasheet(HTML) 18 Page - ATMEL Corporation |
18 / 50 page ![]() 18 AT42QT1111-MU / AT42QT1111-AU [DATASHEET] 9571C–AT42–05/2013 4.7.2 7-key Mode In 7-key mode, the detect outputs DETECT0 to DETECT6 become active on pins 22 – 27 and 30. These outputs provide configurable PWM signals that indicate when each of the keys is touched. 7-key mode is configured by clearing the MODE bit in the Device Mode setup byte (see Section 7.4 on page 28). Each DETECT output can be individually configured to output a PWM signal while the matching key is in detect or out of detect. This signal can be one of nine levels, ranging from low (PWM = 0%) to high (PWM = 100%). This allows for the use of an indicating LED. This is achieved by enabling the appropriate bit in the Key to LED setup byte (see Section 7.14 on page 34), and setting the desired outputs levels or PWMs in setup addresses 9 to 15 (see Section 7.12 on page 32). 4.8 Trigger Modes 4.8.1 Timed Trigger In 11-key mode, The QT1111 can be configured to use the internal clock as a timed trigger. In this case, the QT1111 is configured with a cycle period, such that each acquisition cycle starts a specified length of time after the start of the previous cycle. If the cycle period is set to 0, each acquisition cycle starts as soon as the previous one has finished, resulting in the acquisition cycles running back-to-back in a “free run” mode. The use of a timed trigger, and the cycle period to be used, is set in the Device Mode setup byte (see Section 7.4 on page 28). 4.8.2 Synchronized Trigger Alternatively, the QT1111 can operate in “synchronized” mode. In this mode, SNS10K is used as a SYNC pin to trigger key acquisition, rather than using the device internal clock. In this case the maximum number of keys is reduced to 10. The SYNC pin can use one of two methods to trigger key measurements, selectable via bit 4 of the Device Mode setup byte (see Section 7.4 on page 28): Low Level and Rising Edge. With the Low Level method the QT1111 operates in “free run” mode for as long as the SYNC pin is read as a logical 0. When the SYNC pin goes high, the current measurement cycle will be finished and no more key measurements will be taken until the SYNC pin goes low again. The low level trigger should be a minimum of 1 ms so that there is sufficient time for the device to detect the low level. With the Rising Edge method all enabled keys are measured once when a rising edge is detected on the SYNC pin. This allows key measurements to be synchronized to an external event or condition. Note: In SYNC mode a single acquisition burst is carried out for self-testing at start-up. No further bursts occur unless triggered via the SYNC pin. For example, the SYNC pin can be used by the host to synchronize several devices to each other. This would ensure that only one of the devices outputs pulses at any given time and signals from one QT1111 do not interfere with the measurements from another. Another use for synchronizing to the rising edge is to steady the signals when the device is running off a mains transformer with insufficient mains frequency filtering that is causing a 50 Hz or 60 Hz ripple on Vdd. If the mains voltage is scaled down with a simple voltage divider and connected to the SYNC pin, then the key measurement can be triggered by the rising edge detected at a positive going zero-crossing. Note that in this case, each key signal will be taken at the same point in the cycle, so Vdd will be the same at each measurement for a given key and the signals will be steadier. |
Similar Part No. - AT42QT1111-AU_14 |
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Similar Description - AT42QT1111-AU_14 |
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