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AT42QT2100 Datasheet(PDF) 4 Page - ATMEL Corporation |
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AT42QT2100 Datasheet(HTML) 4 Page - ATMEL Corporation |
4 / 44 page 4 AT42QT2100 [DATASHEET] 9554E–AT42–01/13 I/O CMOS input/output I CMOS input only OD CMOS open drain output (pull-up to Vdd) OF CMOS output that can float during Reset, Sleep or LP modes P Ground or power 13 SNSB7 (1) I/O Sense pin. Connect to CsB7 Open 14 SS I SPI Slave Select (active low) - 15 MOSI I SPI Master Out /Slave In - 16 MISO OF SPI Master In/Serial Out - 17 SCK I SPI Clock - 18 VDD P Power - 19 DRDY OF SPI Data Ready handshake line Open 20 CHANGE OF State change notification Open 21 VSS P Ground - 22 SPREAD OD Spread-spectrum drive Connect to Vdd (high) to enable Connect to Vss (low) to disable - 23 SNSA1 (1) I/O Sense pin. Connect to CsA1 Open 24 SNSKA1 I/O Sense pin. Connect to any CsA + slider/wheel Open 25 SNSA2 (1) I/O Sense pin. Connect to CsA2 Open 26 SNSKA2 I/O Sense pin. Connect to any CsA + slider/wheel Open 27 SNSA3 (1) I/O Sense pin. Connect to CsA3 Open 28 SNSKA3 I/O Sense pin. Connect to any CsA + slider/wheel Open 29 RESET I Reset (active low) Vdd via resistor 30 SNSB1 (1) I/O Sense pin. Connect to CsB1 Open 31 SNSKB1 I/O Sense pin. Connect to any CsB + Key Open 32 SNSB2 (1) I/O Sense pin. Connect to CsB2 Open 1. SNS terminals can be paired with any SNSK terminals of the same group. For example, SNSA1 can be paired with any SNSKA terminal. Table 1-1. Pin Listing (Continued) Pin Name Type Function If Unused, Connect To... |
Similar Part No. - AT42QT2100_14 |
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Similar Description - AT42QT2100_14 |
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