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AT42QT2100 Datasheet(PDF) 17 Page - ATMEL Corporation |
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AT42QT2100 Datasheet(HTML) 17 Page - ATMEL Corporation |
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17 / 44 page  17 AT42QT2100 [DATASHEET] 9554E–AT42–01/13 After the SPI transfer is completed, the QT2100 will generate a set of three acquire bursts if LPB = 1, during which DRDY will be low. The mode and options settings sent from the host to the QT2100 during the SPI transfer take effect after the set of acquire bursts. If either LP mode or Sleep mode is selected, the QT2100 will go back to sleep with DRDY high provided no key is detected as possibly touched. If Sync mode is selected, the QT2100 will go back to sleep with DRDY high provided no key is detected as possibly touched. The CHANGE pin will go high at this time if a key is confirmed as touched. SS Wake pulse: In LP Mode, a wake pulse may be used on the SS pin to either trigger an LPB acquire burst or to wake the device in advance of communications. The pulse should be at least 22 µs in duration. When used prior to communications, there should be a delay of 100 µs to 1 ms between the end of the SS Pulse and the following SS assertion. 4.4.4 Sleep Mode Sleep mode offers the lowest possible current drain, in the low microamp region. Figure 4-3. LP Mode SPI Operation SPI Operation with LPB = 0 SPI Operation with LPB = 1 Note: With LPB = 1, a pulse on SS with or without communications triggers an acquisition burst to follow communications. Pulse width > 22 µs. Acquire Bursts >22us /SS from host SCLK from Host Host Data Output (QT2100 Input - MOSI) command bytes response bytes QT Data Output 3-state 3-state (QT2100 Out - MISO) don't care don't care don't care don't care don't care don't care don't care No SPI Communication SPI Communication Acquire Bursts >22us /SS from host SCLK from Host Host Data Output (QT2100 Input - MOSI) command bytes response bytes QT Data Output 3-state 3-state (QT2100 Out - MISO) don't care don't care don't care |
Similar Part No. - AT42QT2100_14 |
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Similar Description - AT42QT2100_14 |
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