TLC1549C, TLC1549I, TLC1549M

10-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL

SLAS059C – DECEMBER 1992 – REVISED MARCH 1995

6

POST OFFICE BOX 655303

SC

Threshold

Detector

NODE 512

REF –

REF+

ST

512

VI

To Output

Latches

1

1

2

4

8

16

128

256

REF+

REF+

REF+

REF+

REF+

REF+

REF –

REF –

REF –

REF –

REF –

REF –

REF –

REF –

ST

ST

ST

ST

ST

ST

ST

ST

Figure 1. Simplified Model of the Successive-Approximation System

chip-select operation

The trailing edge of CS starts all modes of operation, and CS can abort a conversion sequence in any mode.

A high-to-low transition on CS within the specified time during an ongoing cycle aborts the cycle, and the device

returns to the initial state (the contents of the output data register remain at the previous conversion result). Care

should be exercised to prevent CS from being taken low close to completion of conversion because the output

data may be corrupted.

reference voltage inputs

There are two reference inputs used with the TLC1549: REF + and REF –. These voltage values establish the

upper and lower limits of the analog input to produce a full-scale and zero reading respectively. The values of

REF +, REF –, and the analog input should not exceed the positive supply or be lower than GND consistent with

the specified absolute maximum ratings. The digital output is at full scale when the input signal is equal to or

higher than REF + and at zero when the input signal is equal to or lower than REF –.