4

3

2

1

Top View

4

3

2

1

Bottom View

A

B

C

D

A

B

C

D

ACB

ACB

BGND

FB

ACB

ACB

BGND

FB

PVIN

PVIN

BP

MODE

PVIN

PVIN

BP

MODE

SW

SW

EN

VCON

SW

SW

EN

VCON

PGND

PGND

SGND

VDD

PGND

PGND

SGND

VDD

LM3243

SNVS782B – OCTOBER 2010 – REVISED FEBRUARY 2013

www.ti.com

Connection Diagram

16-Bump 0.4 mm Pitch Thin DSBGA Package

PIN DESCRIPTIONS

Pin #

Name

Description

A1

PGND

Power Ground to the internal NFET switch.

B1

C1

SGND

Signal Analog and Control Ground (Low Current)

D1

VDD

Analog Supply Input.

A2

Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect

SW

B2

specification of the LM3243.

Enable Input. Set this digital input HIGH for normal operation. For shutdown, set low. Pin has an

C2

EN

800 k

Ω internal pulldown resistor.

D2

VCON

A3

PVIN

Power Supply Voltage Input to the internal PFET switch and ACB.

B3

Bypass mode Input. Set the pin HIGH for forced Bypass mode operation. Set the pin LOW for

C3

BP

automatic Analog Bypass mode (recommended).

PWM/PFM Mode Selection Input. Setting the pin HIGH allows for PFM or PWM, depending on

D3

MODE

the load current. Setting the pin LOW forces the part to be in PWM only.

A4

ACB

Analog Current Bypass. Connect to the output at the output filter capacitor.

B4

C4

BGND

Active Current assist and analog Bypass Ground (High Current).

D4

FB

Feedback Analog Input. Connect to the output at the output filter capacitor.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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