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LM4992 Datasheet(PDF) 22 Page - Texas Instruments |
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LM4992 Datasheet(HTML) 22 Page - Texas Instruments |
22 / 23 page ![]() V V ADC REF - V V AMP ADC - R P O =R GAIN= 2R ||Z P IN 2R +2R ||Z O P IN V ADC FS GAIN V AMP PP = THS770012 SLOS669C – FEBRUARY 2010 – REVISED JANUARY 2012 www.ti.com For common-mode analysis, assume that VAMP± = VOCM and VADC± = VADC (the specification for the ADC input common-mode voltage). VREF is chosen to be a voltage within the system (such as the ADC or amplifier analog supply) or ground, depending on whether the voltage must be pulled up or down, and RO is chosen to be a reasonable value, such as 49.9 Ω. With these known values, RP can be found by using Equation 1: (1) The insertion of this resistor network also attenuates the amplifier output signal. The gain (or loss) can be calculated by Equation 2: (2) Using the gain and knowing the full-scale input of the ADC, VADC FS, the required amplitude to drive the ADC with the network can be calculated using Equation 3: (3) Using the ADC examples given previously, Table 3 shows sample calculations of the value of RP and VAMP FS for full-scale drive, and then for –1dB (often times, the ADC drive is backed off from full-scale in applications, so lower amplitudes may be acceptable). All voltages are in volts, resistors in Ω (the nearest standard value should be used), and gain as noted. Table 3 does not include the ADS5424 because no level shift is required with this device. Table 3. Example RP for Various ADCs VOCM VADC VREF RINT RO RP GAIN GAIN VADC FS VAMP PP VAMP PP ADC (VDC) (VDC) (VDC) ( Ω) ( Ω) ( Ω) (V/V) (dB) (VPP) FS (VPP) –1dBFS (VPP) ADS5485 2.5 3.1 5 1k 50 158.3 0.73 –2.71 2 4.10 3.65 ADS6149 2.5 1.5 0 NA 50 75.0 0.60 –4.44 2 3.33 2.97 ADS4149 2.5 0.95 0 NA 50 30.6 0.38 –8.40 2 5.26 4.69 ADS4149 0(1) 0.95 2.5 NA 50 81.6 0.62 –4.15 2 3.23 2.88 (1) THS770012 with ±2.5V supply. The calculated values for the ADS5485 give the lowest attenuation, and because of the high VFS, it requires 3.65VPP from the amplifier to drive to –1dBFS. Performance of the THS770012 is still very good up to 130MHz at this level, but the designer may want to further back off from full-scale for best performance and consider trading reduced SNR performance for better SFDR performance. The values calculated for the ADS6149 show reasonable design targets and should work with good performance. Note the ADS6149 does not have buffered inputs, and the inputs have equivalent resistive impedance that varies with sampling frequency. In order to account for the increased loss, half of this resistance should be used for the value of RINT in Equation 2. The values calculated for the low input common-mode of the ADS4149 result in large attenuation of the amplifier signal leading to 5.26VPP being required for full-scale ADC drive. This amplitude is greater than the maximum capability of the device. With a single +5V supply, the THS770012 is not suitable to drive this ADC in dc-coupled applications unless the ADC input is backed off towards –6dBFS. Another option is to operate the THS770012 with a split ±2.5V supply, and is shown in the last row of Table 3. For this situation, if the +2.5V is used as the pull-up voltage, only 2.88VPP is required for the –1dBFS input to the ADS4149. See the Operation with Split Supply ±2.5V section for more detail. Note that the ADS4149 does not have buffered inputs and the inputs have equivalent resistive impedance that varies with sampling frequency. In order to account for the increased loss, half of this resistance should be used for the value of RINT in Equation 2. As with any design, testing is recommended to validate whether it meets the specific design goals. 22 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): THS770012 |
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