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M29W128GH70N3E Datasheet(PDF) 66 Page - Numonyx B.V |
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M29W128GH70N3E Datasheet(HTML) 66 Page - Numonyx B.V |
66 / 94 page DC and AC parameters M29W128GH, M29W128GL 66/94 Figure 17. Write enable controlled program waveforms (8-bit mode) 1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check of status register data polling bit and by a read operation that outputs the data, DOUT, programmed by the previous Program command. 2. PA is the address of the memory location to be programmed. PD is the data to be programmed. 3. DQ7 is the complement of the data bit being programmed to DQ7 (see Section 7.2.1: Data polling bit (DQ7)). 4. SeeTable 27: Write AC characteristics, write enable controlled, Table 28: Write AC characteristics, chip enable controlled and Table 26: Read AC characteristics for details on the timings. AI13333 G W A0-A22/ A–1 DQ0-DQ7 E 555h AOh PA PA 3rd cycle 4th cycle PD DQ7 DOUT DOUT tAVAV tAVAV tAVWL tWLAX Data Polling Read cycle tELWL tWHEH tELQV tGHWL tWLWH tWHWL tWHWH1 tGLQV tDVWH tWHDX tGHQZ tAXQX |
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