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ZXRD1033PQ16 Datasheet(PDF) 9 Page - Diodes Incorporated |
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ZXRD1033PQ16 Datasheet(HTML) 9 Page - Diodes Incorporated |
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9 / 28 page  Applications (continued) Low Battery Flag The low battery flag threshold can be set by the user to trip at a level determined by the equation: VLBSET = 1.25 (1 + RC RD ) RD is recommended to be 10k where RC and RD are connected as follows: Hysteresis is typically 20mV at the LBSET pin. Current Limit A current limit is set by the low value resistor in the output path, RSENSE. Since the resistor is only used for overload current limit, it does not need to be accurate and can hence be a low cost device. The value of the current limit is set by using the equation: ILIM (A) = 50 (mV) RSENSE (mΩ ) A graph of Current Limit v RSENSE is shown in the typical characteristics. This should assist in the selection of RSENSE appropriate to application. If desired, RSENSE can also be on the input supply side. When used on the input side RSENSE should be in series with the upper output device (i.e. in series with the drain or source in N and P channel solutions respectively).Typically in this configuration RSENSE will be 20m . Hiccup Time Constant The hiccup circuit (at the ’delay’ pin) provides overload protection for the solution. The threshold of the hiccup mode is determined by the value of RSENSE, When >50mV is developed across the sense resistor, the hiccup circuit is triggered, inhibiting the device. It will stay in this state depending upon the time constant of the resistor and capacitor connected at the ’delay’ pin. In order to keep the dissipation down under overload conditions it is recommended the circuit be off for approximately 100ms. If for other application reasons this is too long an off period, this can be reduced at least by 10:1, care needs to be taken that any increased dissipation in the external MOSFET is still acceptable. The resistor capacitor combination R1,C1 recommended in the applications circuits provides a delay of 100ms. Soft Start & Loop Stability Soft start is determined by the time constant of the capacitor and resistor C7 and R3. Typically a good starting point is C7 = 22 µF and R3 = 24k for fixed voltage variants. For fully adjustable variants see Optimising for Transient Response later in the applications section. This network also helps provide good loop stability. Low Quiescent Shutdown Shutdown control is provided via the SHDN pin, putting the device in to a low quiescent sleep mode. In some circumstances where rapid sequencing of VCC can occur (when VCC is turned off and back on) and VCC has a very rapid rise time (100-200ms) timing conflicts can occur. 9 ZXRD1000 SERIES ISSUE 4 - OCTOBER 2000 |
Similar Part No. - ZXRD1033PQ16 |
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Similar Description - ZXRD1033PQ16 |
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