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DS92CK16TMTCX Datasheet(PDF) 5 Page - Tyco Electronics |
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DS92CK16TMTCX Datasheet(HTML) 5 Page - Tyco Electronics |
5 / 17 page ![]() DS92CK16 www.ti.com SNAS044C – NOVEMBER 1999 – REVISED APRIL 2013 Switching Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (1) (2). Symbol Parameter Conditions Min Typ Max Units DIFFERENTIAL RECEIVER CHARACTERISTICS tPHLDR Differential Propagation Delay High to Low. CLKI/O to CLKOUT CL = 15 pF 1.3 2.8 3.8 ns VID = 250 mV tPLHDR Differential Propagation Delay Low to High. CLKI/O to CLKOUT 1.3 2.9 3.8 ns Figure 1 Figure 2 tSK1R Duty Cycle Distortion(3) (pulse skew) 100 400 ps |tPLH–tPHL| tSK2R Channel to Channel Skew; Same Edge (4) 30 80 ps tSK3R Part to Part Skew (5) 2.5 ns tTLHR Transition Time Low to High (6) 0.4 1.4 2.4 ns (20% to 80% ) tTHLR Transition Time High to Low(6) 0.4 1.3 2.2 ns (80% to 20% ) tPLHOER Propagation Delay Low to High CL = 15 pF 1.0 3 4.5 ns ( OEto CLKOUT) Figure 3 Figure 4 tPHLOER Propagation Delay High to Low 1.0 3 4.5 ns (OE to CLKOUT) fMAX Maximum Operating Frequency (7) 100 125 MHz DIFFERENTIAL DRIVER TIMING REQUIREMENTS tPHLDD Differential Propagation Delay High to Low. CrdCLKIN to CL = 15 pF 0.5 1.8 2.5 ns CLKI/O RL = 37.5Ω Figure 6 Figure 7 tPLHDD Differential Propagation Delay Low to High. CrdCLKIN to 0.5 1.8 2.5 ns CLKI/O tPHLCrd CrdCLKIN to CLKOUT Propagation Delay High to Low CL = 15 pF 2.0 4.5 6.0 ns Figure 8 Figure 9 tPLHCrd CrdCLKIN to CLKOUT Propagation Delay Low to High 2.0 4.5 6.0 ns tSK1D Duty Cycle Distortion (pulse skew) 600 ps |tPLH–tPHL| (8) tSK2D Differential Part-to-Part Skew (9) 2.0 ns tTLHD Differential Transition Time (6) 0.4 0.75 1.4 ns (20% to 80% ) tTHLD Differential Transition Time (6) 0.4 0.75 1.4 ns (80% to 20% ) tPHZD Transition Time High to TRI-STATE. DE to CLKI/O 10 ns tPLZD Transition Time Low to TRI-STATE. DE to CLKI/O VIN = 0V to VCC 10 ns CL = 15 pF, tPZHD Transition Time TRI-STATE to High. DE to CLKI/O 32 ns RL = 37.5Ω tPZLD Transition Time TRI-STATE to Low. DE to CLKI/O 32 ns Figure 10 Figure 11 fMAX Maximum Operating Frequency (7) 100 125 MHz (1) CL includes probe and fixture capacitance. (2) Generator waveform for all tests unless otherwise specified: f = 25 MHz, Zo = 50 Ω, tr = 1 ns, tf = 1 ns (10%–90%). To ensure fastest propagation delay and minimum skew, clock input edge rates should not be slower than 1 ns/V; control signals not slower than 3 ns/V. In general, the faster the input edge rate, the better the AC performance. (3) tSK1R is the difference in receiver propagation delay (|tPLH–tPHL|) of one device, and is the duty cycle distortion of the output at any given temperature and VCC. The propagation delay specification is a device to device worst case over process, voltage and temperature. (4) tSK2R is the difference in receiver propagation delay between channels in the same device of any outputs switching in the same direction. This parameter is specified by design and characterization. (5) tSK3R, part-to-part skew, is the difference in receiver propagation delay between devices of any outputs switching in the same direction. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. TSK3R is defined as Max–Min differential propagation delay.This parameter is specified by design and characterization. (6) All device output transition times are based on characterization measurements and are specified by design. (7) Generator input conditions: tr/tf < 1 ns, 50% duty cycle, differential (1.10V to 1.35V pk-pk). Output Criteria: 60%/40% duty cycle, VOL(max) 0.4V, VOH(min) 2.7V, Load = 7 pF (stray plus probes). (8) tSK1D is the difference in driver propagation delay (|tPLH–tPHL|) and is the duty cycle distortion of the CLKI/O outputs. (9) tSK2D part-to-part skew, is the difference in driver propagation delay between devices of any outputs switching in the same direction. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. tSK2D is defined as Max–Min differential propagation delay. Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DS92CK16 |
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