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CS43L43-KZ Datasheet(PDF) 3 Page - Cirrus Logic

Part # CS43L43-KZ
Description  Low Voltage,Stereo DAC With Headphone Amp
Download  36 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43L43-KZ Datasheet(HTML) 3 Page - Cirrus Logic

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CS43L43
DS479PP3
3
SWITCHING CHARACTERISTICS - INTERNAL SERIAL CLOCK.................. 31
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE................. 32
DC ELECTRICAL CHARACTERISTICS .......................................................... 33
DIGITAL INPUT CHARACTERISTICS & SPECIFICATIONS .......................... 33
THERMAL CHARACTERISTICS AND SPECIFICATIONS.............................. 33
RECOMMENDED OPERATING SPECIFICATIONS .......................................34
ABSOLUTE MAXIMUM RATINGS................................................................... 34
7.0 PARAMETER DEFINITIONS ............................................................................. 35
8.0 REFERENCES ................................................................................................... 35
9.0 PACKAGE DIMENSIONS .................................................................................36
LIST OF FIGURES
Figure 1. Typical Connection Diagram .............................................................................. 5
Figure 2. I2S Data .............................................................................................................. 8
Figure 3. Left Justified up to 24-Bit Data ........................................................................... 8
Figure 4. Right Justified Data ............................................................................................ 8
Figure 5. De-Emphasis Curve ........................................................................................... 8
Figure 6. Optional Headphone Mute Circuit .................................................................... 11
Figure 7. Timing for Headphone Mute ............................................................................. 11
Figure 8. Control Port Timing .......................................................................................... 13
Figure 9. ATAPI Block Diagram ....................................................................................... 23
Figure 10. Output Test Load ............................................................................................ 26
Figure 11. Single-Speed Stopband Rejection ................................................................. 28
Figure 12. Single-Speed Transition Band ........................................................................ 28
Figure 13. Single-Speed Transition Band (Detail) ........................................................... 28
Figure 14. Single-Speed Passband Ripple ...................................................................... 28
Figure 15. Double-Speed Stopband Rejection ................................................................ 28
Figure 16. Double-Speed Transition Band ...................................................................... 28
Figure 17. Double-Speed Transition Band (Detail) .......................................................... 29
Figure 18. Double-Speed Passband Ripple .................................................................... 29
Figure 19. External Serial Mode Input Timing ................................................................. 30
Figure 20. Internal Serial Mode Input Timing .................................................................. 31
Figure 21. Internal Serial Clock Generation .................................................................... 31
Figure 22. Control Port Timing - I2C Mode ..................................................................... 32
LIST OF TABLES
Table 1. CS43L43 Operational Mode ................................................................................ 6
Table 2. Single-Speed Mode Standard Frequencies ......................................................... 6
Table 3. Double-Speed Mode Standard Frequencies ....................................................... 6
Table 4. Internal SCLK/LRCK Ratio .................................................................................. 7
Table 5. Digital Interface Format - Stand-Alone Mode ......................................................7
Table 6. De-Emphasis Control .......................................................................................... 9
Table 7. Example Analog Volume Settings ..................................................................... 17
Table 8. Example Digital Volume Settings ...................................................................... 18
Table 9. Example Bass Boost Settings ........................................................................... 18
Table 10. Example Treble Boost Settings ....................................................................... 19
Table 11. Example Limiter Attack Rate Settings ............................................................. 21
Table 12. Example Limiter Release Rate Settings .......................................................... 21
Table 13. ATAPI Decode ................................................................................................. 23
Table 14. Digital Interface Format - Control Port Mode ................................................... 24


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