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CS43L43-KZ Datasheet(PDF) 13 Page - Cirrus Logic |
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CS43L43-KZ Datasheet(HTML) 13 Page - Cirrus Logic |
13 / 36 page ![]() CS43L43 DS479PP3 13 3.8.3 I2C Write To write to the device, follow the procedure below while adhering to the control port Switching Spec- ifications in section 6. 1) Initiate a START condition to the I2C bus followed by the address byte, 00100000. The eighth bit of the address byte is the R/W bit. 2) Wait for an acknowledge (ACK) from the part, then write to the memory address pointer, MAP. This byte points to the register to be written. 3) Wait for an acknowledge (ACK) from the part, then write the desired data to the register pointed to by the MAP. 4) If the INCR bit (see section 3.8.2) is set to 1, repeat the previous step until all the desired registers are written, then initiate a STOP condition to the bus. 5) If the INCR bit is set to 0 and further I2C writes to other registers are desired, it is necessary to initiate a repeated START condition and follow the procedure detailed from step 1. If no further writes to other registers are desired, initiate a STOP condition to the bus. 3.8.4 I2C Read To read from the device, follow the procedure below while adhering to the control port Switching Specifications. 1) Initiate a START condition to the I2C bus followed by the address byte, 00100001. The eighth bit of the address byte is the R/W bit. 2) After transmitting an acknowledge (ACK), the device will then transmit the contents of the regis- ter pointed to by the MAP. The MAP will contain the address of the last register written to the MAP, or the default address (see section 3.9) if an I2C read is the first operation performed on the device. 3) Once the device has transmitted the contents of the register pointed to by the MAP, issue an ACK. 4) If the INCR bit is set to 1, the device will continue to transmit the contents of successive registers. Continue providing a clock and issue an ACK after each byte until all the desired registers are read, then initiate a STOP condition to the bus. 5) If the INCR bit is set to 0 and further I2C reads from other registers are desired, it is necessary to initiate a repeated START condition and follow the procedure detailed from step 1. If no further reads from other registers are desired, initiate a STOP condition to the bus. SD A SC L 00 100 0 R/W Sta r t AC K DA T A 1- 8 ACK DAT A 1- 8 AC K Sto p NO T E 0 N O T E : If op er atio n is a w r ite , th is by te c onta ins the M e m o r y A ddr e s s P o in te r , M A P . If ope r a tion is a r e a d , th is by te c o n tains th e data of th e r egis ter po in ted to by th e M A P . Figure 8. Control Port Timing |
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