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S80L186EB16 Datasheet(PDF) 82 Page - InnovASIC, Inc |
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S80L186EB16 Datasheet(HTML) 82 Page - InnovASIC, Inc |
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82 / 85 page  IA186EB/IA188EB Data Sheet 8-Bit/16-Bit Microcontrollers July 10, 2011 IA211080314-13 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 82 of 85 1-888-824-4184 Errata No. 12 Problem: Illegal serial port modes do not match OEM part. Description: If the mode bits of the serial control register (S1CON, S0CON) are set to an illegal encoding (0x5, 0x6, or 0x7), the Innovasic part acts as though it were in mode 4. The OEM part acts as if it were in mode 1. Workaround: Use a valid encoding for serial mode. Errata No. 13 Problem: Non-maskable interrupt (NMI) can be pre-empted by maskable interrupt. Description: When instruction execution unit is in Decode state for 2 or more consecutive cycles and an NMI is recognized, it could be pre-empted by a maskable interrupt. Workaround: None. Errata No. 14 Problem: Ready signal may not be recognized in bus cycles with zero wait states. Description: When a chip select is set to use the ready signal to extend a bus cycle that normally has no wait states (Start register bits 3-0 == 0000), the ready signal may not be recognized in time to extend the bus cycle. Workaround: Set wait states to 1 or more if using ready to extend bus cycles. |
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