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S80L186EB16 Datasheet(PDF) 78 Page - InnovASIC, Inc |
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S80L186EB16 Datasheet(HTML) 78 Page - InnovASIC, Inc |
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78 / 85 page  IA186EB/IA188EB Data Sheet 8-Bit/16-Bit Microcontrollers July 10, 2011 IA211080314-13 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 78 of 85 1-888-824-4184 Errata No. Problem Ver. 0 Ver. 2 12 Illegal serial port modes do not match OEM part. Exists Exists 13 Non-maskable interrupt (NMI) can be pre-empted by maskable interrupt. Exists Exists 14 Ready signal may not be recognized in bus cycles with zero wait states. Exists Exists 9.2 Detail Errata No. 1 Problem: Alternate Mode (TxCON[1] == 1) for timer 0 and 1 has some functional issues. Description: TxOUT will continuously toggle at 1/2 CLKOUT regardless of count register values. The maxcount compare will not work. The live count will compare against TxCMPA and TxCMPB in alternate cycles. This could cause a compare (and the associated interrupt, or switch the intended compare, or stop counting altogether) to occur early or not at all. The TxOUT pin may start in the wrong state if the user writes to TxCON register Bit [12]. When in retrigger mode, Timer 1 will not function correctly. Input pulses on T0IN will cause counter to begin counting. Workaround: None. |
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