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S80L186EB16 Datasheet(PDF) 77 Page - InnovASIC, Inc |
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S80L186EB16 Datasheet(HTML) 77 Page - InnovASIC, Inc |
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77 / 85 page  IA186EB/IA188EB Data Sheet 8-Bit/16-Bit Microcontrollers July 10, 2011 IA211080314-13 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 77 of 85 1-888-824-4184 9. Errata The following errata are associated with Version 0 of the IA186EB/IA188EB. A workaround to the identified problem has been provided where possible. 9.1 Summary Table 25 presents a summary of errata. Table 25. Summary of Errata Errata No. Problem Ver. 0 Ver. 2 1 Alternate Mode (TxCON[1] == 1) for timer 0 and 1 has some functional issues. Exists Fixed 2 When the extension byte (mod field) is set to ―11,‖ some instructions will cause the CPU to hang. Exists Fixed 3 When the chip is put in SFNM mode for INT0 or INT1, the LVL bit is automatically set for those interrupts. Exists Fixed 4 Timer 2 will stop or not start counting. Exists Fixed 5 Write does not occur when counter is actively counting. Exists Fixed 6 Program Counter can become corrupted if an interrupt occurs. Exists Fixed 7 Bound instruction uses bad data when index addresses are on odd boundary in memory. Exists Fixed 8 Pin LOCK_n does not have an internal pullup and will float during reset and bus hold. Exists Exists 9 The Relocation Register (RELREG, PCB offset 0xA8) can only be modified by an 8-bit write. Exists Exists 10 When the timer compare register for any of the timers is set to x0000, the max count is xFFFF instead of x10000 as in the OEM part. Exists Exists 11 NMI cannot bring chip out of powerdown mode. - Exists |
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