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S80L186EB16 Datasheet(PDF) 44 Page - InnovASIC, Inc |
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S80L186EB16 Datasheet(HTML) 44 Page - InnovASIC, Inc |
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44 / 85 page  IA186EB/IA188EB Data Sheet 8-Bit/16-Bit Microcontrollers July 10, 2011 IA211080314-13 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 44 of 85 1-888-824-4184 4. Functional Description 4.1 Device Architecture Architecturally, the IA186EB and IA188EB microcontrollers include the following functional modules: Bus Interface Unit Clock Generator Interrupt Control Unit Timer/Counter Unit Serial Communications Unit Chip-Select Unit I/O Port Unit Refresh Control Unit Power Management Unit A functional block diagram of the IA186EB/IA188EB is shown in Figure 10. Descriptions of the functional modules are provided in the following subsections. 4.1.1 Bus Interface Unit The IA186EB/IA188EB bus controller that generates local bus control signals and uses a hold/hlda protocol to share the local bus with other bus masters. The bus controller generates 20 address bits, read and write control signals, and bus-cycle status information. A ready input is used to extend a bus cycle beyond the minimum four clock cycles. |
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