3

AT49BV/LV4096A

1618H–FLASH–4/04

Block Diagram

Device Operation

READ: The AT49BV/LV4096A is accessed like an EPROM. When CE and OE are low

and WE is high, the data stored at the memory location determined by the address pins

is asserted on the outputs. The outputs are put in the high-impedance state whenever

CE or OE is high. This dual-line control gives designers flexibility in preventing bus

contention.

COMMAND SEQUENCES: When the device is first powered on, it will be reset to the

read or standby mode, depending upon the state of the control line inputs. In order to

perform other device functions, a series of command sequences are entered into the

device. The command sequences are shown in the Command Definitions table (I/O8 -

I/O15 are don’t care inputs for the command codes). The command sequences are writ-

ten by applying a low pulse on the WE or CE input with CE or WE low (respectively) and

OE high. The address is latched on the falling edge of CE or WE, whichever occurs last.

The data is latched by the first rising edge of CE or WE. Standard microprocessor write

timings are used. The address locations used in the command sequences are not

affected by entering the command sequences.

RESET: A RESET input pin is provided to ease some system applications. When

RESET is at a logic high level, the device is in its standard operating mode. A low level

on the RESET input halts the present device operation and puts the outputs of the

device in a high-impedance state. When a high level is reasserted on the RESET pin,

the device returns to the read or standby mode, depending upon the state of the control

inputs. By applying a 12V ± 0.5V input signal to the RESET pin, the boot block array can

be reprogrammed even if the boot block program lockout feature has been enabled (see

“Boot Block Programming Lockout Override” section).

ERASURE: Before a byte or word can be reprogrammed, it must be erased. The erased

state of memory bits is a logic “1”. The entire device can be erased by using the Chip

Erase command or individual sectors can be erased by using the Sector Erase

commands.

VCC

GND

OE

CONTROL

LOGIC

DATA INPUTS/OUTPUTS

I/O0 - I/O15

WE

CE

RESET

ADDRESS

INPUTS

Y DECODER

INPUT/OUTPUT

BUFFERS

PROGRAM DATA

LATCHES

Y-GATING

3FFFF

MAIN MEMORY

(240K WORDS)

PARAMETER

BLOCK 2

4K WORDS

PARAMETER

BLOCK 1

4K WORDS

BOOT BLOCK

8K WORDS

04000

03FFF

03000

02FFF

X DECODER

02000

01FFF

00000