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AT49LV8192T-12RI Datasheet(PDF) 7 Page - ATMEL Corporation |
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AT49LV8192T-12RI Datasheet(HTML) 7 Page - ATMEL Corporation |
7 / 13 page AT49BV/LV8192(T) 7 AC Read Waveforms(1)(2)(3)(4) Notes: 1. CE may be delayed up to t ACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to t CE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on t ACC. 3. t DF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested. AC Read Characteristics Symbol Parameter AT49BV/LV8192-12 AT49BV/LV8192-15 AT49BV/LV8192-20 Units Min Max Min Max Min Max t ACC Address to Output Delay 120 150 200 ns t CE (1) CE to Output Delay 120 150 200 ns t OE (2) OE to Output Delay 0 50 0 100 0 100 ns t DF (3)(4) CE or OE to Output Float 0 30050050 ns t OH Output Hold from OE, CE or Address, whichever occurred first 00 0 ns Input Test Waveforms and Measurement Level t R, tF < 5 ns Output Test Load Note: 1. This parameter is characterized and is not 100% tested. Pin Capacitance (f = 1 Mhz, T = 25 °C)(1) Typ Max Units Conditions C IN 46 pF V IN = 0V C OUT 812 pF V OUT = 0V |
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