AT49BV/LV8192(T)

4

TOG G LE B I T :

I n add itio n to D A T A pollin g th e

AT49BV/LV8192 provides another method for determining

the end of a program or erase cycle. During a program or

erase operation, successive attempts to read data from the

device will result in I/O6 toggling between one and zero.

Once the program cycle has completed, I/O6 will stop tog-

gling and valid data will be read. Examining the toggle bit

may begin at any time during a program cycle.

HARDWARE DATA PROTECTION: Hardware features

pr o t ect ag ainst ina d ver t e n t pr ogr am s to th e

AT49BV/LV8192 in the following ways: (a) V

V

ited. (b) V

V

ms (typical) before programming. (c) Program inhibit: hold-

ing any one of OE low, CE high or WE high inhibits pro-

gram cycles. (d) Noise filter: pulses of less than 15 ns (typi-

cal) on the WE or CE inputs will not initiate a program

cycle.

INPUT LEVELS: While operating with a 2.7V to 3.6V

power supply, the address inputs and control inputs (OE,

CE, and WE) may be driven from 0 to 5.5V without

adversely affecting the operation of the device. The I/O

lines can only be driven from 0 to V