AT49F8192/8192T

3

ERASURE: Before a word can be reprogrammed, it must

be erased. The erased state of the memory bits is a logical

“1”. The entire device can be erased at one time by using a

6-byte software code.

After the software chip erase has been initiated, the device

will internally time the erase operation so that no external

clocks are required. The maximum time needed to erase

CHIP ERASE: If the boot block lockout has been enabled,

the Chip Erase function is disabled; sector erases for the

parameter blocks and main memory block will still operate.

After the full chip erase the device will return back to read

mode. Any command during chip erase will be ignored.

SECTOR ERASE: As an alternative to a full chip erase,

the device is organized into three sectors that can be indi-

vidually erased. There are two 8K word parameter block

sections and one sector consisting of the boot block and

the main memory array block. The Sector Erase command

is a six bus cycle operation. The sector address is latched

on the falling WE edge of the sixth cycle while the 30H data

input command is latched at the rising edge of WE. The

sector erase starts after the rising edge of WE of the sixth

cycle. The erase operation is internally controlled; it will

automatically time to completion. When the boot block pro-

gramming lockout feature is not enabled, the boot block

and the main memory block will erase together (from the

same sector erase command). Once the boot region has

been protected, only the main memory array sector will

erase when its sector erase command is issued.

WORD PROGRAMMING: Once a memory block is

erased, it is programmed (to a logical “0”) on a word-by-

word basis. Programming is accomplished via the internal

device command register and is a 4 bus cycle operation.

The device will automatically generate the required internal

program pulses.

Any commands written to the chip during the embedded

programming cycle will be ignored. If a hardware reset hap-

pens during programming, the data at the location being

programmed will be corrupted. Please note that a data “0”

cannot be programmed back to a “1”; only erase operations

can convert “0”s to “1”s. Programming is completed after

the specified tBP cycle time. The DATA polling feature may

also be used to indicate the end of a program cycle.

BOOT BLOCK PROGRAMMING LOCKOUT: The device

has one designated block that has a programming lockout

feature. This feature prevents programming of data in the

designated block once the feature has been enabled. The

size of the block is 8K words. This block, referred to as the

boot block, can contain secure code that is used to bring up

the system. Enabling the lockout feature will allow the boot

code to stay in the device while data in the rest of the

device is updated. This feature does not have to be acti-

vated; the boot block's usage as a write protected region is

optional to the user. The address range of the 48F8192

boot block is 00000H to 01FFFH while the address range of

the 49F8192T is 7E000H to 7FFFFH.

Once the feature is enabled, the data in the boot block can

no longer be erased or programmed when input levels of

5.5V or less are used. Data in the main memory block can

still be changed through the regular programming method.

To activate the lockout feature, a series of six program

commands to specific addresses with specific data must be

performed. Please refer to the Command Definitions table.

BOOT BLOCK LOCKOUT DETECTION: A software

method is available to determine if programming of the boot

block section is locked out. When the device is in the soft-

ware product identification mode (see Software Product

Identification Entry and Exit sections) a read from address

location 00002H will show if programming the boot block is

locked out. If the data on I/O0 is low, the boot block can be

programmed; if the data on I/O0 is high, the program lock-

out feature has been enabled and the block cannot be pro-

grammed. The software product identification exit code

should be used to return to standard operation.

BOOT BLOCK PROGRAMMING LOCKOUT OVER-

RIDE: The user can override the boot block programming

lockout by taking the RESET pin to 12 volts during the

entire chip erase, sector erase or word programming oper-

ation. When the RESET pin is brought back to TTL levels

the boot block programming lockout feature is again active.

PRODUCT IDENTIFICATION: The product identification

mode identifies the device and manufacturer as Atmel. It

may be accessed by hardware or software operation. The

hardware operation mode can be used by an external pro-

grammer to identify the correct programming algorithm for

the Atmel product.

For details, see Operating Modes (for hardware operation)

or Software Product Identification. The manufacturer and

device code is the same for both modes.

DATA POLLING: The AT49F8192 features DATA polling

to indicate the end of a program cycle. During a program

cycle an attempted read of the last byte loaded will result in

the complement of the loaded data on I/O7. Once the pro-

gram cycle has been completed, true data is valid on all

outputs and the next cycle may begin. During a chip or sec-

tor erase operation, an attempt to read the device will give

a “0” on I/O7. Once the program or erase cycle has com-

pleted, true data will be read from the device. DATA polling

may begin at any time during the program cycle.

TOGGLE BIT: In addition to DATA polling the AT49F8192

provides another method for determining the end of a pro-

gram or erase cycle. During a program or erase operation,

successive attempts to read data from the device will result

in I/O6 toggling between one and zero. Once the program

cycle has completed, I/O6 will stop toggling and valid data