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AT45DB021-JI Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT45DB021-JI Datasheet(HTML) 3 Page - ATMEL Corporation |
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3 / 18 page  AT45DB021 3 opcode must be followed by 15 don’t care bits, nine address bits, and eight don't care bits. Since the buffer size is 264-bytes, nine address bits (BFA8-BFA0) are required to specify the first byte of data to be read from the buffer. The CS pin must remain low during the loading of the opcode, the address bits, the don’t care bits, and the read- ing of data. When the end of a buffer is reached, the device will continue reading back at the beginning of the buffer. A low to high transition on the CS pin will terminate the read operation and tri-state the SO pin. MAIN MEMORY PAGE TO BUFFER TRANSFER: A page of data can be transferred from the main memory to either buffer 1 or buffer 2. An 8-bit opcode, 53H for buffer 1 and 55H for buffer 2, is followed by the five reserved bits, 10 address bits (PA9-PA0) which specify the page in main memory that is to be transferred, and nine don’t care bits. The CS pin must be low while toggling the SCK pin to load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of the page of data from the main memory to the buffer will begin when the CS pin transitions from a low to a high state. During the transfer of a page of data (t XFR), the status register can be read to determine whether the transfer has been completed or not. MAIN MEMORY PAGE TO BUFFER COMPARE: A page of data in main memory can be compared to the data in buffer 1 or buffer 2. An 8-bit opcode, 60H for buffer 1 and 61H for buffer 2, is followed by 24 address bits consisting of the five reserved bits, 10 address bits (PA9-PA0) which specify the page in the main memory that is to be compared to the buffer, and nine don't care bits. The loading of the opcode and the address bits is the same as described previously. The CS pin must be low while toggling the SCK pin to load the opcode, the address bits, and the don't care bits from the SI pin. On the low to high transition of the CS pin, the 264 bytes in the selected main memory page will be com- pared with the 264 bytes in buffer 1 or buffer 2. During this time (tXFR), the status register will indicate that the part is busy. On completion of the compare operation, bit 6 of the status register is updated with the result of the compare. Program BUFFER WRITE: Data can be shifted in from the SI pin into either buffer 1 or buffer 2. To load data into either buffer, an 8-bit opcode, 84H for buffer 1 or 87H for buffer 2, is followed by 15 don't care bits and nine address bits (BFA8-BFA0). The nine address bits specify the first byte in the buffer to be written. The data is entered following the address bits. If the end of the data buffer is reached, the device will wrap around back to the beginning of the buffer. Data will continue to be loaded into the buffer until a low to high transition is detected on the CS pin. BUFFER TO MAIN MEMORY PAGE PROGRAM WITH BUILT-IN ERASE: Data written into either buffer 1 or buffer 2 can be programmed into the main memory. An 8-bit opcode, 83H for buffer 1 or 86H for buffer 2, is followed by the five reserved bits, 10 address bits (PA9-PA0) that spec- ify the page in the main memory to be written, and nine additional don't care bits. When a low to high transition occurs on the CS pin, the part will first erase the selected page in main memory to all 1s and then program the data stored in the buffer into the specified page in the main memory. Both the erase and the programming of the page are internally self timed and should take place in a maxi- mum time of t EP. During this time, the status register will indicate that the part is busy. BUFFER TO MAIN MEMORY PAGE PROGRAM WITH- OUT BUILT-IN ERASE: A previously erased page within main memory can be programmed with the contents of either buffer 1 or buffer 2. An 8-bit opcode, 88H for buffer 1 or 89H for buffer 2, is followed by the five reserved bits, 10 address bits (PA9-PA0) that specify the page in the main memory to be written, and nine additional don’t care bits. When a low to high transition occurs on the CS pin, the part will program the data stored in the buffer into the specified page in the main memory. It is necessary that the page in main memory that is being programmed has been previ- ously programmed to all 1s (erased state). The program- ming of the page is internally self timed and should take place in a maximum time of tP. During this time, the status register will indicate that the part is busy. MAIN MEMORY PAGE PROGRAM: This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program with Built-In Erase operations. Data is first shifted into buffer 1 or buffer 2 from the SI pin and then pro- grammed into a specified page in the main memory. An 8- bit opcode, 82H for buffer 1 or 85H for buffer 2, is followed by the five reserved bits and 19 address bits. The 10 most significant address bits (PA9-PA0) select the page in the main memory where data is to be written, and the next nine address bits (BFA8-BFA0) select the first byte in the buffer to be written. After all address bits are shifted in, the part will take data from the SI pin and store it in one of the data buffers. If the end of the buffer is reached, the device will wrap around back to the beginning of the buffer. When there is a low to high transition on the CS pin, the part will first erase the selected page in main memory to all 1s and then program the data stored in the buffer into the specified page in the main memory. Both the erase and the program- ming of the page are internally self timed and should take place in a maximum of time t EP. During this time, the status register will indicate that the part is busy. AUTO PAGE REWRITE: This mode is only needed if multi- ple bytes within a page or multiple pages of data are modi- fied in a random fashion. This mode is a combination of two operations: Main Memory Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-In Erase. A page of data is first transferred from the main memory to buffer 1 or buffer 2, and then the same data (from buffer 1 |
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