3

0456H–FLASH–2/05

AT29C512

3.

Block Diagram

4.

Device Operation

4.1

Read

The AT29C512 is accessed like an EPROM. When CE and OE are low and WE is high, the data

stored at the memory location determined by the address pins is asserted on the outputs. The

outputs are put in the high impedance state whenever CE or OE is high. This dual-line control

gives designers flexibility in preventing bus contention.

4.2

Byte Load

Byte loads are used to enter the 128 bytes of a sector to be programmed or the software codes

for data protection. A byte load is performed by applying a low pulse on the WE or CE input with

CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE or

WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.

4.3

Program

The device is reprogrammed on a sector basis. If a byte of data within a sector is to be changed,

data for the entire sector must be loaded into the device. Any byte that is not loaded during the

programming of its sector will be indeterminate. Once the bytes of a sector are loaded into the

device, they are simultaneously programmed during the internal programming period. After the

first data byte has been loaded into the device, successive bytes are entered in the same man-

ner. Each new byte to be programmed must have its high-to-low transition on WE (or CE) within

150 µs of the low-to-high transition of WE (or CE) of the preceding byte. If a high-to-low transi-

tion is not detected within 150 µs of the last low-to-high transition, the load period will end and

the internal programming period will start. A7 to A15 specify the sector address. The sector

address must be valid during each high-to-low transition of WE (or CE). A0 to A6 specify the

byte address within the sector. The bytes may be loaded in any order; sequential loading is not

required. Once a programming operation has been initiated, and for the duration of t

operation will effectively be a polling operation.