DS90LV047A

SNLS044C – MAY 2000 – REVISED APRIL 2013

www.ti.com

Typical Application

Figure 7. Point-to-Point Application

APPLICATION INFORMATION

General application guidelines and hints for LVDS drivers and receivers may be found in the following application

notes: LVDS Owner's Manual (lit #550062-001), AN808, AN977, AN971, AN916, AN805, AN903.

LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as

is shown in Figure 7. This configuration provides a clean signaling environment for the fast edge rates of the

drivers. The receiver is connected to the driver through a balanced media which may be a standard twisted pair

cable, a parallel pair cable, or simply PCB traces. Typically, the characteristic differential impedance of the media

is in the range of 100

Ω. A termination resistor of 100Ω (selected to match the media), and is located as close to

the receiver input pins as possible. The termination resistor converts the driver output current (current mode) into

a voltage that is detected by the receiver. Other configurations are possible such as a multi-receiver

configuration, but the effects of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as

well as ground shifting, noise margin limits, and total termination loading must be taken into account.

The DS90LV047A differential line driver is a balanced current source design. A current mode driver, generally

speaking has a high output impedance and supplies a constant current for a range of loads (a voltage mode

driver on the other hand supplies a constant voltage for a range of loads). Current is switched through the load in

one direction to produce a logic state and in the other direction to produce the other logic state. The output

current is typically 3.1 mA, a minimum of 2.5 mA, and a maximum of 4.5 mA. The current mode driver requires

(as discussed above) that a resistive termination be employed to terminate the signal and to complete the loop

as shown in Figure 7. AC or unterminated configurations are not allowed. The 3.1 mA loop current will develop a

differential voltage of 310mV across the 100

Ω termination resistor which the receiver detects with a 250mV

minimum differential noise margin, (driven signal minus receiver threshold (250mV – 100mV = 150mV)). The

The current mode driver provides substantial benefits over voltage mode drivers, such as an RS-422 driver. Its

quiescent current remains relatively flat versus switching frequency. Whereas the RS-422 voltage mode driver

increases exponentially in most case between 20 MHz–50 MHz. This is due to the overlap current that flows

between the rails of the device when the internal gates switch. Whereas the current mode driver switches a fixed

current between its output without any substantial overlap current. This is similar to some ECL and PECL

current than similar PECL devices. AC specifications for the driver are a tenfold improvement over other existing

RS-422 drivers.

The TRI-STATE function allows the driver outputs to be disabled, thus obtaining an even lower power state when

the transmission of data is not required.

The DS90LV047A has a flow-through pinout that allows for easy PCB layout. The LVDS signals on one side of

the device easily allows for matching electrical lengths of the differential pair trace lines between the driver and

the receiver as well as allowing the trace lines to be close together to couple noise as common-mode. Noise

isolation is achieved with the LVDS signals on one side of the device and the TTL signals on the other side.

6

Submit Documentation Feedback

Copyright © 2000–2013, Texas Instruments Incorporated

Product Folder Links: DS90LV047A