TCS3472

COLOR LIGHT-TO-DIGITAL CONVERTER

with IR FILTER

TAOS135 − AUGUST 2012

16

r

r

Copyright

E 2012, TAOS Inc.

The LUMENOLOGY

r Company

www.taosinc.com

RGBC Timing Register (0x01)

The RGBC timing register controls the internal integration time of the RGBC clear and IR channel ADCs in

2.4-ms increments. Max RGBC Count = (256 − ATIME)

Table 6. RGBC Timing Register

FIELD

BITS

DESCRIPTION

ATIME

7:0

VALUE

INTEG_CYCLES

TIME

MAX COUNT

0xFF

1

2.4 ms

1024

0xF6

10

24 ms

10240

0xD5

42

101 ms

43008

0xC0

64

154 ms

65535

0x00

256

700 ms

65535

Wait Time Register (0x03)

Wait time is set 2.4 ms increments unless the WLONG bit is asserted, in which case the wait times are 12

×

longer. WTIME is programmed as a 2’s complement number.

Table 7.

Wait Time Register

FIELD

BITS

DESCRIPTION

WTIME

7:0

REGISTER VALUE

WAIT TIME

TIME (WLONG = 0)

TIME (WLONG = 1)

0xFF

1

2.4 ms

0.029 sec

0xAB

85

204 ms

2.45 sec

0x00

256

614 ms

7.4 sec